Bipolar integrated circuits in SiC for extreme environment operation
13 Feb 2017-Semiconductor Science and Technology (Institute of Physics Publishing (IOPP))-Vol. 32, Iss: 3, pp 034002
TL;DR: Silicon carbide integrated circuits have been suggested for extreme environment operation as discussed by the authors. But the challenge of a new technology is to develop process flow, circuit models and circuit designs for extreme environments operation.
Abstract: Silicon carbide (SiC) integrated circuits have been suggested for extreme environment operation. The challenge of a new technology is to develop process flow, circuit models and circuit designs for ...
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TL;DR: This study provides and validate a comprehensive set of models alongside with their parameters for bulk 3C–SiC and revealed that the proposed models are in a very good agreement to experimental data and confidence ranges were identified.
Abstract: The cubic form of SiC (β- or 3C-) compared to the hexagonal α-SiC polytypes, primarily 4H- and 6H–SiC, has lower growth cost and can be grown heteroepitaxially in large area silicon (Si) wafers which makes it of special interest. This in conjunction with the recently reported growth of improved quality 3C–SiC, make the development of devices an imminent objective. However, the readiness of models that accurately predict the material characteristics, properties and performance is an imperative requirement for attaining the design and optimization of functional devices. The purpose of this study is to provide and validate a comprehensive set of models alongside with their parameters for bulk 3C–SiC. The validation process revealed that the proposed models are in a very good agreement to experimental data and confidence ranges were identified. This is the first piece of work achieving that for 3C–SiC. Considerably, it constitutes the necessary step for finite element method simulations and technology computer aided design.
27 citations
Cites background from "Bipolar integrated circuits in SiC ..."
...Power devices usually aim to operate within this range of temperature values [54]....
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TL;DR: In this article, the ASM-GaN compact model has been enhanced to model the GaN high electron mobility transistors (HEMTs) at extreme temperature conditions, in particular, the temperature dependence of the trapping behavior has been considered.
Abstract: The industry standard advanced SPICE model (ASM)-GaN compact model has been enhanced to model the GaN high electron mobility transistors (HEMTs) at extreme temperature conditions. In particular, the temperature dependence of the trapping behavior has been considered and a simplifying approximation in the temperature modeling of the saturation voltage in the ASM-GaN model has been relaxed. The enhanced model has been validated by comparing the simulation results of the model with the dc ${I}$ – ${V}$ measurement results of a GaN HEMT measured with chuck temperatures ranging from 22 °C to 500 °C. A detailed description of the modeling approach is presented. The new formulation of the ASM-GaN compact model can be used to simulate the circuits designed for extreme temperature environments.
21 citations
Cites background from "Bipolar integrated circuits in SiC ..."
...Such extreme temperatures exceeding a value of 500 ◦C can be easily reached in certain niche applications such as automotives, turbine engines, and Venus and Mercury interplanetary missions [8]–[10]....
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TL;DR: In this paper, high-current 4H-SiC lateral BJTs for high-temperature monolithic integrated circuits are fabricated and three different sizes are optimized in terms of emitter finger width and length and the device layout to have higher current density, lower on-resistance (RON), and more uniform current distribution.
Abstract: High-current 4H-SiC lateral BJTs for high-temperature monolithic integrated circuits are fabricated. The BJTs have three different sizes and the designs are optimized in terms of emitter finger width and length and the device layout to have higher current density (JC), lower on-resistance (RON), and more uniform current distribution. A maximum current gain ( $\beta $ ) of >53 at significantly high current density was achieved for different sizes of SiC BJTs. The BJTs are measured from room temperature to 500 °C. An open-base breakdown voltage (VCEO) of >50 V is measured for the devices.
19 citations
Cites background from "Bipolar integrated circuits in SiC ..."
...S ILICON carbide (SiC) lateral bipolar junction transistors (BJTs) are shown to be an excellent candidate for high-temperature integrated circuits (ICs) [1]–[3]....
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TL;DR: In this paper, a recessed channel CMOS process is presented, where selective doping is achieved by etching epitaxial layers into mesas and a deposited SiO2-film, post-annealed at low temperature and re-oxidized in pyrogenic steam, is used as the gate oxide to produce a conformal gate oxide over the nonplanar topography.
Abstract: Digital electronics in SiC find use in high-temperature applications. The objective of this study was to fabricate SiC CMOS without using ion implantation. In this letter, we present a recessed channel CMOS process. Selective doping is achieved by etching epitaxial layers into mesas. A deposited SiO2-film, post-annealed at low temperature and re-oxidized in pyrogenic steam, is used as the gate oxide to produce a conformal gate oxide over the non-planar topography. PMOS, NMOS, inverters, and ring oscillators are characterized at 200 °C. The PMOS requires reduced threshold voltage in order to enable long-term reliability. This result demonstrates that it is possible to fabricate SiC CMOS without ion implantation and by low-temperature processing.
18 citations
Cites background from "Bipolar integrated circuits in SiC ..."
...demonstrated for use in emitter-coupled logic (ECL) [3], [4] and transistor-transistor logic (TTL) [5], [6]....
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TL;DR: The proposed work is a key step towards SiC-based very large-scale integrated (VLSI) circuits implementation for high-temperature applications.
Abstract: A Process Design Kit (PDK) has been developed to realize complex integrated circuits in Silicon Carbide (SiC) bipolar low-power technology. The PDK development process included basic device modeling, and design of gate library and parameterized cells. A transistor–transistor logic (TTL)-based PDK gate library design will also be discussed with delay, power, noise margin, and fan-out as main design criterion to tolerate the threshold voltage shift, beta ( β ) and collector current ( I C ) variation of SiC devices as temperature increases. The PDK-based complex digital ICs design flow based on layout, physical verification, and in-house fabrication process will also be demonstrated. Both combinational and sequential circuits have been designed, such as a 720-device ALU and a 520-device 4 bit counter. All the integrated circuits and devices are fully characterized up to 500 °C. The inverter and a D-type flip-flop (DFF) are characterized as benchmark standard cells. The proposed work is a key step towards SiC-based very large-scale integrated (VLSI) circuits implementation for high-temperature applications.
17 citations
References
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TL;DR: In this article, the development of extreme temperature (up to 500 °C) integrated circuit technology based on epitaxial 6H-SiC junction field effect transistors (JFETs) is discussed.
Abstract: Extreme temperature semiconductor integrated circuits (ICs) are being developed for use in the hot sections of aircraft engines and other harsh-environment applications well above the 300 °C effective limit of silicon-on-insulator IC technology. This paper reviews progress by the NASA Glenn Research Center and Case Western Reserve University (CWRU) in the development of extreme temperature (up to 500 °C) integrated circuit technology based on epitaxial 6H-SiC junction field effect transistors (JFETs). Simple analog amplifier and digital logic gate ICs fabricated and packaged by NASA have now demonstrated thousands of hours of continuous 500 °C operation in oxidizing air atmosphere with minimal changes in relevant electrical parameters. Design, modeling, and characterization of transistors and circuits at temperatures from 24 °C to 500 °C are also described. CWRU designs for improved extreme temperature SiC JFET differential amplifier circuits are demonstrated. Areas for further technology maturation, needed prior to beneficial system insertion, are discussed. Optical micrograph of a 500 °C durable 6H-SiC JFET differential amplifier IC chip fabricated at NASA prior to packaging. Digitized waveforms measured during the 1st (solid black) and 6519th (dashed grey) hour of 500 °C operational testing show no change in output characteristics.
136 citations
TL;DR: In this paper, the first digital monolithic integrated circuits in the wide bandgap semiconductor silicon carbide (SiC) were reported, implemented in enhancement-mode NMOS using ion implanted MOSFET's with non-self-aligned metal gates.
Abstract: We report the first digital monolithic integrated circuits in the wide bandgap semiconductor silicon carbide (SiC). These logic gates are implemented in enhancement-mode NMOS using ion implanted MOSFET's with non-self-aligned metal gates. We have fabricated and characterized inverters, NAND and NOR gates, XNOR gates, D-latches, RS flip-flops, binary counters, and half adders. All circuits operate properly from room temperature to over 300/spl deg/C. >
99 citations
TL;DR: In this article, the performance of low-voltage 4H-SiC n-p-n bipolar transistors and digital integrated circuits based on emitter coupled logic is reported from -40 °C to 500 °C.
Abstract: Successful operation of low-voltage 4H-SiC n-p-n bipolar transistors and digital integrated circuits based on emitter coupled logic is reported from -40 °C to 500 °C. Nonmonotonous temperature dependence (previously predicted by simulations but now measured) was observed for the transistor current gain; in the range -40 °C-300 °C it decreased when the temperature increased, while it increased in the range 300 °C-500 °C. Stable noise margins of ~ 1 V were measured for a 2-input OR/NOR gate operated on -15 V supply voltage from 0 °C to 500 °C for both OR and NOR output.
84 citations
TL;DR: In this paper, the development of a 15V SiC CMOS technology developed to operate at high temperatures, n and p-channel transistor and preliminary circuit performance over temperature achieved in this technology.
Abstract: The wide band-gap of Silicon Carbide (SiC) makes it a material suitable for high temperature integrated circuits [1], potentially operating up to and beyond 450°C. This paper describes the development of a 15V SiC CMOS technology developed to operate at high temperatures, n and p-channel transistor and preliminary circuit performance over temperature achieved in this technology.
82 citations