BSIM6 -- Benchmarking the Next-Generation MOSFET Model for RF Applications
05 Jan 2014-pp 421-426
TL;DR: The model is found to correlate very well with hardware data and passes all important model quality benchmark tests for analog/RF applications and is a very desirable candidate for future nano-MOSFET simulations.
Abstract: BSIM6 is the new Compact Model Coalition (CMC) standard bulk MOSFET model. It offers excellent fitting capability, accurate RF/analog simulations, and similar implementation features of the small dimension effects as included in the popular BSIM4 model. These features make BSIM6 a very desirable candidate for future nano-MOSFET simulations. In this work we evaluate the capabilities of the model and perform benchmark tests to assess the strengths of the model. Bulk 90nm technology MOSFET data is used to extract BSIM6 for analog/RF specific applications. Industry standard benchmark tests have been performed and results shown against the hardware data (where applicable). The model is found to correlate very well with hardware data and passes all important model quality benchmark tests for analog/RF applications.
Citations
More filters
TL;DR: In this article, a BSIM-based compact model for a high-voltage MOSFET is presented, which has been extended to include the overlap capacitance due to the drift region as well as quasi-saturation effect.
Abstract: A BSIM-based compact model for a high-voltage MOSFET is presented. The model uses the BSIM-BULK (formerly BSIM6) model at its core, which has been extended to include the overlap capacitance due to the drift region as well as quasi-saturation effect. The model is symmetric and continuous, is validated with the TCAD simulations and experimental 35- and 90-V LDMOS and 40-V VDMOS transistors, and shows excellent agreement.
23 citations
Cites methods from "BSIM6 -- Benchmarking the Next-Gene..."
..., velocity saturation, draininduced barrier lowering and threshold shift (DIBL and DITS), mobility degradation, impact ionization, self-heating effect (SHE), and so on, are adopted from the BSIM4 model [17] in a form suitable for maintaining symmetry as well as computational efficiency [14], [18]....
[...]
01 Apr 2019
TL;DR: The recent and upcoming enhancements of the industry standard BSIM-BULK model are presented and an analytical model for bulk charge effect, in both current and capacitance, is implemented to improve the model accuracy for transconductance and output conductance.
Abstract: In this work, we present the recent and upcoming enhancements of the industry standard BSIM-BULK (formerly BSIM6) model. BSIM-BULK is the latest body referenced compact model for bulk MOSFETs having a unified core, which is developed by the BSIM group for accurate design of analog and RF circuits. The model satisfies the symmetry test for DC and AC, correctly predicts harmonic slope, and exhibits accurate results for RF and analog simulations. In order to further improve the model accuracy for transconductance $(g_{m})$ and output conductance $(g_{ds})$, an analytical model for bulk charge effect, in both current and capacitance, is implemented. Several other advanced models are added to capture real device physics. These include: parasitic current at the shallow trench isolation edges; leakage current components in zero threshold voltage native devices; new model for NQS to capture the NQS effects up to the millimeter wave regime; self heating effect; and heavily halo implanted MOSFET’s anomalous g m , flicker noise and I DS mismatch. All these enhancements have been implemented to high standards of computational efficiency and robustness.
7 citations
Cites background or methods from "BSIM6 -- Benchmarking the Next-Gene..."
...1(b), the BSIM-BULK model successfully passes both DC and AC GST tests [7], [8]....
[...]
...It indicates differential capacitances: δcg , δcb and δcsd versus VX [7], [8]....
[...]
01 Nov 2018
TL;DR: Measurement and scalable modelcard development methodology for 180 nm Bulk MOSFET technology using BSIM-BULK compact model is presented and accurately predicts the device behavior for entire range of temperature and device dimensions.
Abstract: Measurement and scalable modelcard development methodology for 180 nm Bulk MOSFET technology using BSIM-BULK compact model is presented in this paper. On-wafer device characterization is performed to extract the global parameter set. These devices are fabricated at Semi-Conductor Laboratory (SCL) Chandigarh, India. With the extracted parameter set, BSIM-BULK model accurately predicts the device behavior for entire range of temperature and device dimensions.
3 citations
04 Jul 2019
TL;DR: The charge based compact model for Drain-Extended MOS (DEMOS) transistor accurately predicts the special effects of quasi-saturation, present in high voltage MOSFETs and low voltage BSIM-BULK model.
Abstract: The charge based compact model for Drain-Extended MOS (DEMOS) transistor is presented in this work. Proposed model accurately predicts the special effects of quasi-saturation, present in high voltage MOSFETs. Modeling methodology used in this paper includes the drift resistance model based on intrinsic drain current, and low voltage BSIM-BULK model. Developed model along with the BSIM-BULK compact model can be used for the modeling of low voltage bulk MOSFETs to DEMOS transistors. Proposed model results are validated with Technology Computer-Aided Design (TCAD) DEMOS data. The model is accurately capturing the impact of drift region on DC I-V characteristics and their derivatives.
2 citations
Dissertation•
01 Jan 2016
2 citations
Cites background from "BSIM6 -- Benchmarking the Next-Gene..."
...Although the same tests are used, more focus is directed towards non-quasi-static operation[18] and validation of device capacitances[19]....
[...]
References
More filters
Proceedings Article•
20 Jun 2013TL;DR: BSIM6 has been developed especially to address symmetry around Vds = 0, thus providing smooth higher order derivatives and BSIM-CMG is a CMC standard surface potential based model for common symmetric double, triple, quadruple and surround gate (nanowire) MOSFETs.
Abstract: Continuous technology advancements have forced MOSFET architecture to evolve from bulk to SOI to multigate MOSFETs. BSIM compact models have helped circuit designers to realize their designs first time correct using accurate physical models used in SPICE simulation. BSIM3 and BSIM4 are threshold voltage based bulk MOSFET models while BSIM6 is charge based bulk MOSFET model, which include physical effects such as mobility degradation, current saturation, high frequency models etc. BSIM6 has been developed especially to address symmetry around Vds = 0, thus providing smooth higher order derivatives. BSIM-CMG is a CMC standard surface potential based model for common symmetric double, triple, quadruple and surround gate (nanowire) MOSFETs. Long channel DIBL also called Drain-Induced Threshold Shift (DITS) effect and asymmetric charge weighing factor etc. have been recently included in it. BSIM-IMG is a surface potential based model to simulate ultra-thin body devices such as UTBSOI but also other thin body devices such as MOS2 transistor.
21 citations
"BSIM6 -- Benchmarking the Next-Gene..." refers methods in this paper
...The model is found to correlate very well with hardware data and passes all important model quality benchmark tests for analog/RF applications....
[...]
19 Mar 2007
TL;DR: In this article, the PSP model was selected as the first surface potential-based industry standard compact MOSFET model and the results of several qualitative "benchmark" tests that over the last two years were used to verify the physical behavior of the new model and its usefulness for future generations of CMOS IC design.
Abstract: Recently, the PSP model was selected as the first surface-potential-based industry standard compact MOSFET model. This work presents the results of several qualitative "benchmark" tests that over the last two years were used to verify the physical behavior of the new model and its usefulness for future generations of CMOS IC design. These include newly developed tests and previously unavailable experimental data stemming from low-power, RF, mixed-signal, and analog applications of MOSFETs.
17 citations