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Circuit simulation method for fin edge roughness effect in fin type field effect transistor

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TLDR
In this article, a circuit simulation method for a fin edge roughness effect in a fin type field effect transistor, and belongs to the field of a microelectronic device, is presented.
Abstract
The invention discloses a circuit simulation method for a fin edge roughness effect in a fin type field effect transistor, and belongs to the field of a microelectronic device. The circuit simulation method is based on a predictable intensive model; a rough fin edge is extracted from an electron microscopy image of a fin line; the self-correlation function of the fin edge is calculated; then fin width distribution under the influence of the fin edge roughness can be obtained by a computational formula; and the fin width distribution is embedded into a simulation netlist of circuit simulation software to perform circuit simulation to obtain circuit performance parameters caused by the fin edge roughness. By adoption of the circuit simulation method, the device characteristic fluctuation influences can be accurately obtained; all the parameters can be subjected to reference regulation by a result obtained by TCAD monte carlo simulation; and compared with the conventional method, the fluctuation of a (sub-threshold slope) SS of the device, and the correlation between the fluctuation of the SS and a threshold voltage Vth can be predicted.

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Citations
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Method for measuring roughness of semiconductor fins

TL;DR: In this article, a method for measuring roughness of semiconductor fin is proposed, which comprises the steps of: step S01, providing a substrate having a surface on which the semiconductor fins are formed; step S02, placing a metal electrode on one side of one semiconducted fin; and step S03, grounding the fin and applying a certain voltage to the metal electrode, step S04, and recording electric field forces generated when the metal electrodes is placed at different positions on the sidewall of the semiconducting fin, so as to measure the roughness
References
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Patent

Semiconductor structures with deep trench capacitor and methods of manufacture

TL;DR: An integrated FinFET and deep trench capacitor structure and methods of manufacture are disclosed in this paper, where the method includes forming at least one deep trench capacitance in a silicon on insulator (SOI) substrate.
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