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Journal ArticleDOI

CMOS image sensors: electronic camera-on-a-chip

01 Oct 1997-IEEE Transactions on Electron Devices (IEEE)-Vol. 44, Iss: 10, pp 1689-1698
TL;DR: In this article, the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
Abstract: CMOS active pixel sensors (APS) have performance competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost, and miniaturization. This paper discusses the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
Citations
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Proceedings ArticleDOI
01 Nov 2015
TL;DR: A prototype sensor was built to demonstrate a 3D integrated CMOS image sensor that incorporates pixel-parallel signal processing architecture and successfully captured video images, thus demonstrating the feasibility of 3D integration technology and pixel-Parallel architecture for futureCMOS image sensors.
Abstract: A prototype sensor was built to demonstrate a 3D integrated CMOS image sensor that incorporates pixel-parallel signal processing architecture. FDSOI substrates with photodiodes and in-pixel ADC circuits were directly bonded after surface activation by plasma treatment. X, Y and θ alignment errors of 20 bonded samples were reduced to within ±0.7 μm, ±0.4 μm, and ±0.004°, respectively by using IR camera system. The resulting sensor successfully captured video images, thus demonstrating the feasibility of 3D integration technology and pixel-parallel architecture for future CMOS image sensors.
Proceedings ArticleDOI
01 Oct 2019
TL;DR: A novel logarithmic pixel for high dynamic range complementary metal-oxide semiconductor (CMOS) imagers is proposed that consists of one transistor and photodiode per pixel and hence has a high fill factor.
Abstract: A novel logarithmic pixel for high dynamic range complementary metal-oxide semiconductor (CMOS) imagers is proposed. The proposed image sensor consists of one transistor and photodiode per pixel and hence has a high fill factor. Therefore, the imagers using the proposed pixel can have increased pixel density compared to the imagers employing conventional voltage-mode logarithmic pixel. The logarithmic behaviour of the proposed pixel ensures a high dynamic range to the image sensor.

Cites background from "CMOS image sensors: electronic came..."

  • ...Complementary metal-oxide semiconductor (CMOS) image sensor has replaced charge coupled devices (CCD) in most of the applications owing to its low cost, low power consumption and ease of integration with the other circuitries in an image sensor chip [1, 2]....

    [...]

Book ChapterDOI
21 Sep 2011
TL;DR: The experimental results show the new method is applied successfully in CMOS SNR measurement and the calculated speed is increased almost 200 times compared to that of the traditional method even thought the processing data size is over the embedded system memory.
Abstract: The embedded system is the future trends of instrument and the larger memory capacity of embedded system is favor to different variety of applications. The commercial embedded systems are always restricted by their embedded memory capacity and required to be upgraded, especially in image application. This article reports a new design and development of an embedded system built in a CMOS image SNR measurement instrument. The new developed approach using the mix technique of large data processing (MLDP) method for CMOS SNR calculation is described. The MLDP method uses an external memory device as auxiliary memory in the regular embedded system to break the memory capacity limitation. The experimental results show the new method is applied successfully in CMOS SNR measurement and the calculated speed is increased almost 200 times compared to that of the traditional method even thought the processing data size is over the embedded system memory.

Cites background from "CMOS image sensors: electronic came..."

  • ...Besides, the images captured by most of the commercial image cameras are analyzed by embedded system [1-5]....

    [...]

  • ...Furth more, some special functions such as dark current analysis [5,6], pattern noise (FPN) correction [7,8], or image signal-to-ratio (SNR) measurement are also integrated in embedded system applications of the cameras....

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J He, H Liang, Y Su, A Zhang, D Zhang, G Zhang 
12 May 2013
TL;DR: The functionality of the proposed 1T CMOS APS architecture has been experimentally verified by a fabricated chip in a standard 0.35 μm CMOS AMIS technology.
Abstract: CMOS active pixel image sensor with single transistor architecture (1T CMOS APS) is proposed in this paper and verified by experiment data. By switching the photo sensing pinned diode, reset and select can be achieved by diode pull-up and capacitive coupling pull-down of the source follower. Thus, the reset and select transistors can be removed. In addition, the reset and select signal lines can be shared to reduce the metal signal line, leading to a very high fill factor. The pixel design and operation principles are discussed in detail in this work. The functionality of the proposed 1T CMOS APS architecture has been experimentally verified by a fabricated chip in a standard 0.35 μm CMOS AMIS technology.
Journal ArticleDOI
TL;DR: Comparator used is modified and replaced by the CMOS inverter with proper setting of the operating point over existing DPS image sensor with added advantage over the previous sensor in terms of power, pixel size and the fill factor.
Abstract: The charge coupled device (CCDs) were used as image sensor for the imaging. Thereafter CMOS sensors introduced like passive pixel sensors, active pixel senor (APS) could give the advantages in the implementation, so the APS could compete with CCDs. However, APS suffered with the problem of poor resolution and fill factor, which resulted the CCD image sensor to retain popularity. The digital pixel sensor (DPS) has overcome the problems associated in APS. This gave many more advantages for effective pixel optimization. Recently, DPS came with the op-amp comparator to implement the ADC on chip for each pixel. This has definitely added advantage over the previous sensor in terms of power, pixel size and the fill factor. In this paper comparator used is modified and replaced by the CMOS inverter with proper setting of the operating point over existing DPS image sensor. In the first part the analysis for the modification is discussed while in the second part simulation results are given for the pixel implementation of the image sensor. The results are tabulated for 2 × 2 and 4 × 4 array implementation.
References
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Journal ArticleDOI
TL;DR: A new semiconductor device concept that consists of storing charge in potential wells created at the surface of a semiconductor and moving the charge over the surface by moving the potential minima is described.
Abstract: In this paper we describe a new semiconductor device concept. Basically, it consists of storing charge in potential wells created at the surface of a semiconductor and moving the charge (representing information) over the surface by moving the potential minima. We discuss schemes for creating, transferring, and detecting the presence or absence of the charge. In particular, we consider minority carrier charge storage at the Si-SiO 2 interface of a MOS capacitor. This charge may be transferred to a closely adjacent capacitor on the same substrate by appropriate manipulation of electrode potentials. Examples of possible applications are as a shift register, as an imaging device, as a display device, and in performing logic.

878 citations

Journal Article
TL;DR: In this article, the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
Abstract: CMOS active pixel sensors (APS) have performance competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost, and miniaturization. This paper discusses the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.

693 citations

Journal ArticleDOI
TL;DR: In this paper, a family of CMOS-based active pixel image sensors (APSs) that are inherently compatible with the integration of on-chip signal processing circuitry is reported.
Abstract: A family of CMOS-based active pixel image sensors (APSs) that are inherently compatible with the integration of on-chip signal processing circuitry is reported. The image sensors were fabricated using commercially available 2-/spl mu/m CMOS processes and both p-well and n-well implementations were explored. The arrays feature random access, 5-V operation and transistor-transistor logic (TTL) compatible control signals. Methods of on-chip suppression of fixed pattern noise to less than 0.1% saturation are demonstrated. The baseline design achieved a pixel size of 40 /spl mu/m/spl times/40 /spl mu/m with 26% fill-factor. Array sizes of 28/spl times/28 elements and 128/spl times/128 elements have been fabricated and characterized. Typical output conversion gain is 3.7 /spl mu/V/e/sup -/ for the p-well devices and 6.5 /spl mu/V/e/sup -/ for the n-well devices. Input referred read noise of 28 e/sup -/ rms corresponding to a dynamic range of 76 dB was achieved. Characterization of various photogate pixel designs and a photodiode design is reported. Photoresponse variations for different pixel designs are discussed.

532 citations


"CMOS image sensors: electronic came..." refers background in this paper

  • ...The photogate APS was introduced by JPL in 1993 [53]‐[ 55 ] for high-performance scientific imaging and lowlight applications....

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Proceedings ArticleDOI
12 Jul 1993
TL;DR: ActivePixel Sensor (APS) as mentioned in this paper is a detector array technology that has at least one active transistor within the pixel unit cell, which eliminates the need for nearly perfect charge transfer, which makes CCD's radiation'soft' and difficult to use under low light conditions, difficult to integrate with on-chip electronics, difficulty to use at low temperatures, and difficulty to manufacture in non-silicon materials that extend wavelength response.
Abstract: Charge-coupled devices (CCDs) are presently the technology of choice for most imaging applications. In the 23 years since their invention in 1970, they have evolved to a sophisticated level of performance. However, as with all technologies, we can be certain that they will be supplanted someday. In this paper, the Active Pixel Sensor (APS) technology is explored as a possible successor to the CCD. An active pixel is defined as a detector array technology that has at least one active transistor within the pixel unit cell. The APS eliminates the need for nearly perfect charge transfer--the Achilles' heel of CCDs. This perfect charge transfer makes CCD's radiation 'soft,' difficult to use under low light conditions, difficult to manufacture in large array sizes, difficult to integrate with on-chip electronics, difficult to use at low temperatures, difficult to use at high frame rates, and difficult to manufacture in non-silicon materials that extend wavelength response. With the active pixel, the signal is driven from the pixel over metallic wires rather than being physically transported in the semiconductor. This paper makes a case for the development of APS technology. The state of the art is reviewed and the application of APS technology to future space-based scientific sensor systems is addressed.

457 citations

Journal ArticleDOI
TL;DR: In this paper, a 2.0 /spl mu/m double-poly, double-metal foundry CMOS active pixel image sensor is reported, which uses TTL compatible voltages, low noise and large dynamic range, and is useful in machine vision and smart sensor applications.
Abstract: A new CMOS active pixel image sensor is reported. The sensor uses a 2.0 /spl mu/m double-poly, double-metal foundry CMOS process and is realized as a 128/spl times/128 array of 40 /spl mu/m/spl times/40 /spl mu/m pixels. The sensor features TTL compatible voltages, low noise and large dynamic range, and will be useful in machine vision and smart sensor applications. >

302 citations