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Journal ArticleDOI

CMOS image sensors: electronic camera-on-a-chip

01 Oct 1997-IEEE Transactions on Electron Devices (IEEE)-Vol. 44, Iss: 10, pp 1689-1698
TL;DR: In this article, the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
Abstract: CMOS active pixel sensors (APS) have performance competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost, and miniaturization. This paper discusses the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
Citations
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Journal ArticleDOI
TL;DR: Progress in light sensing using nanostructured materials is reviewed, focusing on solution-processed materials such as colloidal quantum dots and metal nanoparticles.
Abstract: The detection of photons underpins imaging, spectroscopy, fibre-optic communications and time-gated distance measurements. Nanostructured materials are attractive for detection applications because they can be integrated with conventional silicon electronics and flexible, large-area substrates, and can be processed from the solution phase using established techniques such as spin casting, spray coating and layer-by-layer deposition. In addition, their performance has improved rapidly in recent years. Here we review progress in light sensing using nanostructured materials, focusing on solution-processed materials such as colloidal quantum dots and metal nanoparticles. These devices exhibit phenomena such as absorption of ultraviolet light, plasmonic enhancement of absorption, size-based spectral tuning, multiexciton generation, and charge carrier storage in surface and interface traps.

1,253 citations

Journal ArticleDOI
TL;DR: The state of the art in machine vision inspection and a critical overview of real-world applications are presented and two independent ways to classify applications are proposed.

716 citations

Journal ArticleDOI
TL;DR: This paper provides a comprehensive overview of the emerging field of event-based vision, with a focus on the applications and the algorithms developed to unlock the outstanding properties of event cameras.
Abstract: Event cameras are bio-inspired sensors that differ from conventional frame cameras: Instead of capturing images at a fixed rate, they asynchronously measure per-pixel brightness changes, and output a stream of events that encode the time, location and sign of the brightness changes. Event cameras offer attractive properties compared to traditional cameras: high temporal resolution (in the order of is), very high dynamic range (140dB vs. 60dB), low power consumption, and high pixel bandwidth (on the order of kHz) resulting in reduced motion blur. Hence, event cameras have a large potential for robotics and computer vision in challenging scenarios for traditional cameras, such as low-latency, high speed, and high dynamic range. However, novel methods are required to process the unconventional output of these sensors in order to unlock their potential. This paper provides a comprehensive overview of the emerging field of event-based vision, with a focus on the applications and the algorithms developed to unlock the outstanding properties of event cameras. We present event cameras from their working principle, the actual sensors that are available and the tasks that they have been used for, from low-level vision (feature detection and tracking, optic flow, etc.) to high-level vision (reconstruction, segmentation, recognition). We also discuss the techniques developed to process events, including learning-based techniques, as well as specialized processors for these novel sensors, such as spiking neural networks. Additionally, we highlight the challenges that remain to be tackled and the opportunities that lie ahead in the search for a more efficient, bio-inspired way for machines to perceive and interact with the world.

697 citations


Cites methods from "CMOS image sensors: electronic came..."

  • ...1 combines a conventional active pixel sensor (APS) [52] in the same pixel with DVS....

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Journal Article
TL;DR: In this article, the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
Abstract: CMOS active pixel sensors (APS) have performance competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost, and miniaturization. This paper discusses the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.

693 citations

Journal ArticleDOI
18 Apr 2018-Nature
TL;DR: A way of integrating photonics with silicon nanoelectronics is described, using polycrystalline silicon on glass islands alongside transistors on bulk silicon complementary metal–oxide–semiconductor chips to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing.
Abstract: Electronic and photonic technologies have transformed our lives-from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions1,2. This goal is hindered by the fact that most silicon nanotechnologies-which enable our processors, computer memory, communications chips and image sensors-rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal-oxide-semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing3,4. By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions 5 , but with the performance, complexity and scalability of 'systems on a chip'1,6-8. As transistors smaller than ten nanometres across become commercially available 9 , and as new nanotechnologies emerge10,11, this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

630 citations

References
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Proceedings ArticleDOI
Bart Dierickx1, Danny Scheffer1, Guy Meynants1, Werner Ogiers1, Jan Vlummens1 
19 Dec 1996
TL;DR: The trade-offs for the design, fabrication and interfacing of fast pixel addressable (random-access) cameras are discussed and measures to correct the camera's inherent non-uniformity must not slow down the interface speed.
Abstract: In this article we discuss the trade-offs for the design, fabrication and interfacing of fast pixel addressable (random-access) cameras In order to benefit most from the random addressability, the interface must be optimized for access through a data bus/address bus structure Measures to correct the camera's inherent non-uniformity must not slow down the interface speed

73 citations

Proceedings ArticleDOI
01 May 1990
TL;DR: The results show that good quality grey-level images can be formed, and that CMOS sensors arrays can be successfully integrated with efficient analogue sense amplifiers and with digital control/image-processing logic.
Abstract: Two image array sensors designed and fabricated using a standard two-level metal ASIC CMOS process are described. The results show that good quality grey-level images can be formed, and that CMOS sensors arrays can be successfully integrated with efficient analogue sense amplifiers and with digital control/image-processing logic. The first sensor is a prototype 128*128 pixel test array. The second is a 312*287 pixel image sensor chip which includes all the necessary circuitry to produce full PAL format video output, as well as automatic electronic exposure control and built-in test circuits. Test results characterizing the devices are given, covering dynamic range, spectral response, sensitivity, resistance to blooming, etc. Some potential applications for such devices are mentioned. >

70 citations


"CMOS image sensors: electronic came..." refers methods in this paper

  • ...This passive pixel is the basis for arrays produced by EG&G Reticon, Hitachi [17], Matsushita [18] and more recently, by Edinburgh University and VLSI Vision in Scotland [ 25 ], [26], Linkoping University and IVP in Sweden [27]‐[29], and Toyohashi University [30]....

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Proceedings ArticleDOI
01 Jan 1990
TL;DR: An amplified MOS imager for use in each pixel in a high-speed TV camera is discussed, which is easier to operate and completely free from image lag, and has relatively little smear compared with other devices.
Abstract: An amplified MOS imager (AMI) for use in each pixel in a high-speed TV camera is discussed. The AMI performs such functions as amplification, readout, and resetting independently and completely. Thus the AMI is easier to operate and completely free from image lag, and has relatively little smear (2*10/sup -5/) compared with other devices. The AMI can also handle both hole and electron signals when a photoconductive layer is laminated on its surface. The image area dimensions are 8.8 mm (H)*6.6 mm (V) with 510 (H)*490 (V) pixels. Each pixel has an FET amplifier that enhances signal current 100*immediately after receiving the incident light. A source-follower is used for output signal linearity. The AMI is equipped with three horizontally aligned output lines, each operated at a horizontal clock rate of 30 MHz. The total sampling frequency can be 90 MHz, but the device in this television camera application operates at a sampling frequency of 57 MHz. >

68 citations


"CMOS image sensors: electronic came..." refers methods in this paper

  • ...The photodiode-type (PD) APS was described by Noble in 1968 [9] and has been under investigation by Andoh at NHK in Japan since the late 1980’s [ 39 ]‐[41] in collaboration with Olympus, and later, Mitsubishi Electric....

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Proceedings ArticleDOI
TL;DR: In this paper, the authors present results of the investigation of the design and operation of CMOS active pixel sensors for detection of ultra-low light levels and present a detailed noise model of APS pixel and signal chain.
Abstract: In this paper, we present results of the investigation of the design and operation of CMOS active pixel sensors for detection of ultra-low light levels. We present a detailed noise model of APS pixel and signal chain. Utilizing the noise model, we have developed APS pixel designs that can achieve ultra-low noise and high responsivity. We present results from two test chips, that indicate (1) that less than 5 electrons of read noise is possible with CMOS APS by reducing the size of the pixel transistors, and (2) that high responsivity can be achieved when the fill-factor of the photodiode is reduced.

68 citations

Proceedings ArticleDOI
23 Jun 1994
TL;DR: Common approaches and architectures for ADC and their utility for on-focal-plane integration are discussed and a column-parallel ADC architecture appears to be an effective compromise of chip area, power, circuit speed and ADC resolution.
Abstract: This paper presents approaches for on-focal-plane analog-to-digital conversion (ADC). Common approaches and architectures for ADC and their utility for on-focal-plane integration are discussed. Candidate approaches are analyzed with respect to required amplifier gain, bandwidth, capacitance matching, noise and offsets as a function of ADC resolution. A column-parallel ADC architecture appears to be an effective compromise of chip area, power, circuit speed and ADC resolution. The discussion is valid for both infrared focal-plane arrays and visible image sensors.© (1994) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

62 citations