Comparative study on performance of single precision floating point multiplier using vedic multiplier and different types of adders
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Cites methods from "Comparative study on performance of..."
...Some potential fast-multiplication schemes that have been considered for implementation are the Booth algorithm, the Baugh-Wooley algorithm [9,10], Ūrdhva Tiryagbhyāṃ sutra (Vedic multiplier algorithm) [4,6] and Karatsuba algorithm [2,5,13]....
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"Comparative study on performance of..." refers background in this paper
...By using this less speed can be achieved due to its operation dependency on previous stage carry[7]....
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"Comparative study on performance of..." refers background or methods in this paper
...The enhancement of the worst case delay is attained by incorporating more number of carry skip logics to form a block of carry skip adder [8]....
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...The carry bit from the last stage that means previous least significant stage is used to select the computed values of the output carry and sum [8]....
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