scispace - formally typeset
Proceedings ArticleDOI

Compiler-driven register re-assignment for register file power-density and temperature reduction

Reads0
Chats0
TLDR
This paper proposes a compiler-based register reassignment methodology, which purpose is to break such groups of registers and to uniformly distribute the accesses to the register file, and shows that the underlying problem is NP-hard.
Abstract
Temperature hot-spots have been known to cause severe reliability problems and to significantly increase leakage power. The register file has been previously shown to exhibit the highest temperature compared to all other hardware components in a modern high- end embedded processor, which makes it particularly susceptible to faults and elevated leakage power. We show that this is mostly due to the highly clustered register file accesses where a set of few registers physically placed close to each other are accessed with very high frequency. In this paper we propose a compiler-based register reassignment methodology, which purpose is to break such groups of registers and to uniformly distribute the accesses to the register file. This is achieved with no performance and no hardware overheads. We show that the underlying problem is NP-hard, and subsequently introduce an efficient algorithmic heuristic.

read more

Citations
More filters
Proceedings ArticleDOI

Dynamic thermal management via architectural adaptation

TL;DR: This work argues that runtime adaptation of micro-architectural parameters, such as instruction window size and issue width, is a more effective mechanism for DTM and synergistically combining architectural adaptation with DVFS and fetch gating can achieve the best performance under thermal constraints.
Journal ArticleDOI

Application-Guided Power Gating Reducing Register File Static Power

TL;DR: This paper introduces an application-guided function-level register file power-gating (AFReP) approach to efficiently manage and reduce the RF's static power consumption and enhances a Blackfin processor with the AFReP technology.
Proceedings ArticleDOI

Processor reliability enhancement through compiler-directed register file peak temperature reduction

TL;DR: A compiler-directed register shuffling strategy is proposed to deterministically construct the logical to physical register mapping in a rotating manner, and results confirm that the proposed technique attains, within a limited hardware budget and negligible performance degradation, effective reduction in peak temperature and hence in the expected fault rates for the entire chip.
Book ChapterDOI

RELOCATE: register file local access pattern redistribution mechanism for power and thermal management in out-of-order embedded processor

TL;DR: An architectural solution which redistributes the access pattern to physical registers through a novel register allocation mechanism that regionalizes the register file such that even though accesses within a region are uniformly distributed, the activity levels are spread over the entire register file in a deterministic pattern.
Proceedings ArticleDOI

Exploiting narrow-width values for thermal-aware register file designs

TL;DR: This paper proposes and evaluates three thermal-aware control schemes, thermal sensor (TS), access counter (AC), and register-id (ID) based, to balance the access activity and thus the temperature across different partitions in the VARF to optimize its thermal behavior.
References
More filters
Proceedings ArticleDOI

MiBench: A free, commercially representative embedded benchmark suite

TL;DR: A new version of SimpleScalar that has been adapted to the ARM instruction set is used to characterize the performance of the benchmarks using configurations similar to current and next generation embedded processors.
Proceedings ArticleDOI

MediaBench: a tool for evaluating and synthesizing multimedia and communications systems

TL;DR: The MediaBench benchmark suite as discussed by the authors is a benchmark suite that has been designed to fill the gap between the compiler community and embedded applications developers, which has been constructed through a three-step process: intuition and market driven initial selection, experimental measurement, and integration with system synthesis algorithms to establish usefulness.

Managing the Impact of Increasing Microprocessor Power Consumption

TL;DR: The design team focused from the beginning on reducing power consumption without negatively impacting either the performance or reliability of the processor in any significant way, resulting in a significant reduction in both maximum and typical processor power dissipation.

HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects

TL;DR: The most important features of HotLeakage are the explicit inclusion of temperature, voltage, gate leakage, and parameter variations, and the ability to recalculate leakage currents dynamically as temperature and voltage change due to operating conditions, DVS techniques, etc.
Book

Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools

TL;DR: A new age of embedded computing design is described, in which the processor is central, making the approach radically distinct from contemporary practices of embedded systems design, and why it is essential to take a computing-centric and system-design approach to the traditional elements of nonprogrammable components, peripherals, interconnects and buses.
Related Papers (5)