Journal ArticleDOI
Compilers for Low Power with Design Patterns on Embedded Multicore Systems
Cheng-Yen Lin,Chi-Bang Kuan,Wen-Li Shih,Jenq Kuen Lee +3 more
- Vol. 80, Iss: 3, pp 277-293
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TLDR
This work attempts to devise power optimization schemes in compilers by exploiting the opportunities of the recurring patterns of embedded multicore programs, including Pipe and Filter pattern, MapReduce with Iterator pattern, and Bulk Synchronous Parallel Model.Abstract:
Minimization of power dissipation can be considered at algorithmic, compiler, architectural, logic, and circuit level. Recent research trends for multicore programming models have come to the direction that parallel design patterns can be a solution to develop multicore applications. As parallel design patterns are with regularity, we view this as a great opportunity to exploit power optimizations in the software layer. In this paper, we investigate compilers for low power with parallel design patterns on embedded multicore systems. We evaluate four major parallel design patterns, Pipe and Filter, MapReduce with Iterator, Puppeteer, and Bulk Synchronous Parallel (BSP) Model. Our work attempts to devise power optimization schemes in compilers by exploiting the opportunities of the recurring patterns of embedded multicore programs. The proposed optimization schemes are rate-based optimization for Pipe and Filter pattern , early-exit power optimization for MapReduce with Iterator pattern, power aware mapping algorithm for Puppeteer pattern, and multi-phases power gating scheme for BSP pattern. In our experiments, real world multicore applications are evaluated on a multicore power simulator. Significant power reductions are observed from the experimental results. Therefore, we present a direction for power optimizations that one can further identify additional key design patterns for embedded multicore systems to explore power optimization opportunities via compilers.read more
Citations
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Journal ArticleDOI
Energy Transparency for Deeply Embedded Programs
TL;DR: In this paper, the authors focus on deeply embedded devices, typically used for Internet of Things (IoT) applications, and demonstrate how to enable energy transparency through existing static resource analysis (SRA) techniques and a new target-agnostic profiling technique, without hardware energy measurements.
Journal ArticleDOI
Using Machine Learning Techniques to Detect Parallel Patterns of Multi-threaded Applications
Etem Deniz,Alper Sen +1 more
TL;DR: This work applies machine learning techniques in a novel approach to automatically detect parallel patterns and shows that the k-nearest neighbor, decision trees, and naive Bayes classifier are the most accurate techniques.
Journal ArticleDOI
On Mapping of Reconfigurable Hierarchical Tasks to MP-SoC-Oriented Architectures Under Real-Time and Energy Constraints
Ines Ghribi,Ines Ghribi,Ines Ghribi,Riadh Ben Abdallah,Mohamed Khalgui,Mohamed Khalgui,Zhiwu Li +6 more
TL;DR: A heuristic algorithm for mapping the new reconfigurable hierarchical model on multi-core MP-SOC architectures with two-dimensional hierarchy levels DAGs and shows an increase of performance in terms of execution time and energy consumption.
References
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Book
Design Patterns: Elements of Reusable Object-Oriented Software
TL;DR: The book is an introduction to the idea of design patterns in software engineering, and a catalog of twenty-three common patterns, which most experienced OOP designers will find out they've known about patterns all along.
Journal ArticleDOI
MapReduce: simplified data processing on large clusters
Jeffrey Dean,Sanjay Ghemawat +1 more
TL;DR: This paper presents the implementation of MapReduce, a programming model and an associated implementation for processing and generating large data sets that runs on a large cluster of commodity machines and is highly scalable.
Journal ArticleDOI
MapReduce: simplified data processing on large clusters
Jeffrey Dean,Sanjay Ghemawat +1 more
TL;DR: This presentation explains how the underlying runtime system automatically parallelizes the computation across large-scale clusters of machines, handles machine failures, and schedules inter-machine communication to make efficient use of the network and disks.
Journal ArticleDOI
A bridging model for parallel computation
TL;DR: The bulk-synchronous parallel (BSP) model is introduced as a candidate for this role, and results quantifying its efficiency both in implementing high-level language features and algorithms, as well as in being implemented in hardware.
Journal ArticleDOI
OpenCL: A Parallel Programming Standard for Heterogeneous Computing Systems
TL;DR: The OpenCL standard offers a common API for program execution on systems composed of different types of computational devices such as multicore CPUs, GPUs, or other accelerators as mentioned in this paper, such as accelerators.