Proceedings ArticleDOI

# Comprehensive analysis of TIPS-Pentacene: Polymer blend organic field-effect transistor for device and circuit simulation

01 Oct 2017-

TL;DR: In this paper, a TCAD based approach is presented to model electrical behavior of TIPS-Pentacene: polymer blend organic field effect transistors (OFETs), and stress induced and temperature induced effects are also captured, thereby accurately modeling the device behavior under different operating conditions.

AbstractIn this work, a TCAD based approach is presented to model electrical behavior of TIPS-Pentacene: polymer blend organic field-effect transistors (OFETs). Stress induced and temperature induced effects are also captured, thereby accurately modeling the device behavior under different operating conditions. The framework is validated against experimental results and is then used to estimate the effect of temperature on characteristics of inverter circuit using this device.

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Journal ArticleDOI
TL;DR: In this paper, the authors analyzed the device characteristics of organic thin-film transistors (OTFT) fabricated using trisopropylsilylethynyl (TIPS)-pentacene with the help of a two-dimensional physics-based numerical simulation.
Abstract: The device characteristics of organic thin-film transistors (OTFT) fabricated using tris-isopropylsilylethynyl (TIPS)-pentacene are analyzed with the help of a two-dimensional physics-based numerical simulation. The model incorporates contact barrier at a metal–semiconductor interface, field-dependent mobility, and trap distribution in TIPS-pentacene films and at dielectric-semiconductor interface. The Poole–Frenkel type field-dependence of mobility is included in addition to the contact barrier height of 0.38 eV to describe the non-ideal behavior in the linear region of the output characteristics. An account of the transfer characteristics and its hysteresis behavior is completed in both below- and above- threshold region upon consideration of the presence of acceptor-like traps of an exponential distribution in TIPS-pentacene films and positive trapped charges at dielectric-semiconductor interface. The obtained device parameters not only match the electrical characteristics but also give one an insight on the charge injection, transport, and trap properties of TIPS-pentacene from the perspectives of TFT operation.

62 citations

Journal ArticleDOI

TL;DR: Flexible organic field effect transistors (OFETs) with TIPS-pentacene: polystyrene (PS) blend are demonstrated to exhibit enhanced mobility and significantly improved electrical stability compared to neat TIPS pentacene on poly(4-vinylphenol) (PVP) dielectric (bi-layer OFETs), along with high mechanical stability.
Abstract: Flexible organic field-effect transistors (OFETs) with TIPS-pentacene: polystyrene (PS) blend are demonstrated to exhibit enhanced mobility and significantly improved electrical stability compared to neat TIPS-pentacene on poly(4-vinylphenol) (PVP) dielectric (bi-layer OFETs), along with high mechanical stability. Due to merit of high quality dielectric-semiconductor interface, pristine TIPS-pentacene: PS blend OFETs exhibited maximum mobility of 0.93 cm2 V−1 s−1 with average of 0.44(±0.25) cm2 V−1 s−1 compared to 0.14(±0.10) cm2 V−1 s−1 for bi-layer OFETs with high current on-off ratios on the order 105 for both. Both types of devices exhibited high electrical stability upon bending with increasing magnitude of strain or its duration up to 5 days. However, significant differences in electrical stability of devices were observed upon applying constant bias-stress for 40 min to 1 h. Pristine blend devices exhibited outstanding electrical stability with very low drain current decay of

32 citations

Journal ArticleDOI
TL;DR: In this paper, a vertical phase separation between TIPS-pentacene and polystyrene as confirmed from scanning electron microscopic image, evetually leads to excellent carrier mobility in polymer blend devices compared to that of neat TIPS -pentaene.
Abstract: Phase separation induced high carrier mobility and electrical stability are achieved in organic field-effect transistors using TIPS-pentacene:polystyrene blends. Rigid Si/SiO 2 substrate was especially chosen to explore the phase separation. A vertical phase separation between TIPS-pentacene and polystyrene as confirmed from scanning electron microscopic image, evetually leads to excellent carrier mobility in polymer blend devices compared to that of neat TIPS-pentacene. Maximum hole mobility improved from 0.2 cm 2 V −1 s −1 for neat TIPS-pentacene on SiO 2 to 2.6 cm 2 V −1 s −1 for TIPS-pentacene blends with PS, with average value of 1.5 cm 2 V −1 s −1 . Apart from higher mobility, TIPS-pentacene:PS blend devices also showed much lower decay in drain current (∼30%) during a constant bias-stress of 2 h, compared to neat devices (∼80%). Interestingly, This decay was fully recovered for blend devices under rest conditions. The corresponding shift in the threshold voltage due to bias-stress was lower for TIPS-pentacene:PS device due to better quality of interface as confirmed by lower values of density of interface traps and higher trapping time. High electrical stability in TIPS-pentacene:polystyrene blend devices was also supported by repeatabiliiy studies, which exhibited nearly unchanged device characteristics.

22 citations

### "Comprehensive analysis of TIPS-Pent..." refers background or methods in this paper

• ...It has essentially three layers: TIPS-pentacene rich layer on the top, a PS rich layer in the middle, and a thin TIPS-pentacene layer near dielectric[1]....

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• ...Detailed procedure to fabricate this OFET is given in our earlier report [1]....

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Journal ArticleDOI

TL;DR: In this paper, flexible organic field effect transistors with 6,13(bis-triisopropylsily-lethynyl) pentacene and polystyrene blend are demonstrated with high electro-mechanical stability.
Abstract: High-performance solution processed flexible organic field-effect transistors with 6,13(bis-triisopropylsily-lethynyl) pentacene and polystyrene blend are demonstrated with high electro-mechanical stability. For −5 V operation, field-effect mobility up to 1.1 cm $^{2}~\text{V}^{\mathrm {-1}}~\text{s}^{\mathrm {-1}}$ and threshold voltage as low as −0.1 V were obtained with high current on–off ratios of $\sim 10^{5}$ due to high quality dielectric–semiconductor interface developed during solvent evaporation. Stable electrical characteristics were achieved with increasing duration of mechanical strain, and after multiple cycles of tensile and compressive strain. Drain current decay of 10%, very large trapping time of $\sim 10^{8}$ s, and a very small threshold voltage shift of 0.3 V were observed during bias stress of 1 h, signifying low charge carrier trapping and a high quality of dielectric–semiconductor interface, which was retained largely after two days of continuous tensile strain. Moreover, after 100 cycles of tensile and compressive strain, the corresponding shift in threshold voltage due to bias stress was still $\sim 0.5$ V. Overall, a high performance and stability were demonstrated under collective effects of mechanical and electrical stress.

19 citations