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Computational Aspects of Vlsi
01 Jan 1984-
About: The article was published on 1984-01-01 and is currently open access. It has received 862 citations till now. The article focuses on the topics: Very-large-scale integration.
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TL;DR: It is proved that minimum energy is achieved when the adder is designed for O(log"2n) carry propagation, and a circuit implementation is presented that reduces the average energy consumption in up to 50%.
4 citations
10 Dec 2005
TL;DR: It is demonstrated that the privacy of the base design, without any privacy enhancement techniques, is t = 1, which can be significant for portable, energy-starved applications such as Smart card.
Abstract: VLSI circuits are open to sidechannel attacks which disclose information about its internal state to an adversary. Privacy is a design attribute to quantify the circuit’s resistance and resilience to sidechannel attacks. There has been some recent work in cryptography to capture the notion of privacy in circuits. Several constructions to transform a circuit into a private circuit have also been proposed. In this paper, we quantify the energy cost of providing privacy. We use the classical area-time-energy VLSI complexity theory techniques to prove lower bounds on the energy of any VLSI computation for a given function f parametrized by its privacy P (Privacy P or a P-private circuit implies that at least P bits of the circuit need to be observed to derive a single bit of information about an internal node). The main result establishes a lower bound of Ω(t2n2) on the E or ET or AT2 product of any t-private computation of an n-bit multiplier or shifter. Incidentally, the privacy transformation proposed by Ishai et al [6] will generate n-bit multiplier and shifter with matching energy, energy-time, and AT2 characteristics establishing that these lower bounds are tight. The privacy of the base design, without any privacy enhancement techniques, is t = 1. Hence this demonstrates that the privacy comes at a quadratic multiplicative factor energy cost, which can be significant for portable, energy-starved applications such as Smart card. We further introduce the notion of information splitting secret sharing based privacy enhancement techniques. The lower bound on the energy for this case improves to Ω(Pn2), a factor P improvement.
4 citations
Cites methods or result from "Computational Aspects of Vlsi"
...Many techniques were developed to derive lower bounds on I(f, n) for specific functions [[14], [12], [16]]....
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...The argument for it is similar to that in Ullman [[14] , page 49], which states that moving an input port from one side to the other can move at most n/3 bits....
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01 Oct 1989
TL;DR: An algorithm to find all bridges of an undirected graph on a mesh-connected processor array has the same complexity in terms of time and space as the best previous known algorithm, but has a significantly simpler structure and therefore, it gains a constant factor of about two in time.
Abstract: An algorithm to find all bridges of an undirected graph on a mesh-connected processor array is presented. Asymptotically it has the same complexity in terms of time and space as the best previous known algorithm, the one of Atallah and Kosaraju. But it has a significantly simpler structure and therefore, it gains a constant factor of about two in time.
4 citations
Dissertation•
27 Nov 2003TL;DR: La notion of parallelisme combine a une algorithmique performante permet de gagner du temps afin de repondre au mieux a d'importants besoins de puissance necessaire a the realisation of projets gourmands en temps de calculs et en taille memoire.
Abstract: Nous avons tous l'intuition qu'un travail peut etre realise en beaucoup moins de temps s'il est reparti entre plusieurs personnes ou sur plusieurs machines. Cette notion se nomme le parallelisme qui peut se definir comme l'etat de ce qui se developpe dans la meme direction ou en meme temps. C'est naturellement que la notion de parallelisme a ete appliquee aux ordinateurs. De ce fait, il a ete possible de repondre aux besoins de puissance necessaire a la realisation de projets gourmands en temps de calculs et en taille memoire. Le parallelisme combine a une algorithmique performante permet de gagner du temps afin de repondre au mieux a d'importants besoins. Il rompt avec l'approche classique qui consiste a gagner de la vitesse en effectuant plus rapidement chaque operation, approche bornee par les lois de la physique. La notion de parallelisme a donc grandement contribue a la multiplication des modeles informatiques. Nous nous interesserons au modele systolique et au modele parallele a gros grains baptise (Coarse Grained Multicomputers). Le modele CGM a ete propose par F. Dehne et al. et il possede des proprietes qui le rendent tres interessant d'un point de vue pratique. Il est parfaitement adapte a la modelisation des architectures existantes pour lesquelles le nombre de processeurs peut etre de plusieurs milliers et la taille des donnees peut atteindre plusieurs milliards d'octets. Un algorithme developpe pour ce modele est constitue de calculs locaux utilisant, si possible, des algorithmes sequentiels optimaux et de rondes de communication dont le nombre doit etre independant de la taille des donnees a traiter. Le modele CGM est donc tres interessant d'un point de vue economique. En effet, ce modele est independant des architectures reelles et permet de reutiliser des algorithmes sequentiels efficaces, ce qui le rend tres portable. Dans cette these nous nous interessons a des problemes d'algorithmique du texte. Ces problemes peuvent ameliorer la compression de donnees ou bien etre utilises en bio-informatique. Ainsi, nous proposons des solutions CGM aux problemes de recherche de la plus longue sous-suite croissante, de la plus longue sous-suite commune a deux mots, du plus long suffixe repete en chaque caractere d'un mot et de repetitions. Pour cela, nous sommes partis de solutions systoliques existantes que nous avons adaptees au modele CGM. Le but de ce travail est en fait double. D'une part, nous proposons pour la premiere fois des solutions CGM a ces quatre problemes. D'autre part, nous montrons comment des solutions systoliques peuvent etre derivees en algorithmes CGM. En effet, de nombreux problemes ont ete etudies sur des architectures systoliques, c'est a dire des machines dediees, non reutilisables pour d'autres problemes. Le modele CGM quant a lui permet de travailler avec des machines peu couteuses et reutilisables a souhaits. De plus, l'experience acquise au cours de ces travaux nous permet d'avoir une bonne idee des solutions systoliques adaptables au modele CGM. Ceci pourrait permettre de consolider le pont existant entre modeles a grains fins et modeles a gros grains. Nous finissons cette these par une discussion sur l'equilibrage de charge des solutions proposees et sur la predictivite de l'adaptation d'autres solutions systoliques au modele CGM.
4 citations
08 Sep 2018
TL;DR: Preliminary results of research on the design of a Memetic Algorithm able to solve the Cyclic Bandwidth Sum Problem showed that all the tested MA versions were able to consistently improve its results and give some insights on the suitability of the tested operators.
Abstract: The Cyclic Bandwidth Sum Problem (CBSP) is an NP-Hard Graph Embedding Problem which aims to embed a simple, finite graph (the guest) into a cycle graph of the same order (the host) while minimizing the sum of cyclic distances in the host between guest’s adjacent nodes. This paper presents preliminary results of our research on the design of a Memetic Algorithm (MA) able to solve the CBSP. A total of 24 MA versions, induced by all possible combinations of four selection schemes, two operators for recombination and three for mutation, were tested over a set of 25 representative graphs. Results compared with respect to the state-of-the-art top algorithm showed that all the tested MA versions were able to consistently improve its results and give us some insights on the suitability of the tested operators.
4 citations
Cites background from "Computational Aspects of Vlsi"
...Given the relevant applications of this problem on VLSI designs [1, 15], code design [7], simulation of network topologies for parallel computer systems [12], scheduling in broadcasting based networks [11], signal processing over networks [6] and compressed sensing in sensor networks [10], it has recently caught attention in the combinatorial optimization and operation research areas....
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