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Computational Aspects of Vlsi

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The article was published on 1984-01-01 and is currently open access. It has received 862 citations till now. The article focuses on the topics: Very-large-scale integration.

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Proceedings ArticleDOI

Bounds on the VLSI layout complexity of homogeneous product networks

TL;DR: Borders on the area and wire length required by VLSI layouts of homogeneous product networks with any number of dimensions are obtained by using traditional frameworks like separators and bifurcators, as well as a new method based on combining collinear layouts.
Dissertation

Parallelization of algorithms by explicit partitioning

TL;DR: In order to utilize parallel computers, four approaches, broadly speaking, to the provision of parallel software have been followed: automatic production of parallel code by parallelizing,ilers which act on sequential programs written in existing languages, "add on" features to existing languages that enable the programmer to make use of the parallel computer.
Book ChapterDOI

Input sensitive VLSI layouts for graphs of arbitrary degree

TL;DR: A general method to find area-efficient VLSI layouts of graphs of arbitrary degree is presented, and the layouts obtained are smaller by a factor of Δ2 than those obtained using existing methods.
Journal ArticleDOI

Viable Architectures for High-Performance Computing

TL;DR: The class of highly-overlapping windows (HOWs) networks are presented, which are capable of lower complexity than GHs, comparable performance and better scalability, and the suitability of HOWs for very-high-performance computing is shown.
Proceedings ArticleDOI

Constructing Complete Binary Trees on Petersen-Torus Networks

TL;DR: It was proven that the complete binary tree might be embedded in PT(n,n).