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Computational Aspects of Vlsi

01 Jan 1984-
About: The article was published on 1984-01-01 and is currently open access. It has received 862 citations till now. The article focuses on the topics: Very-large-scale integration.
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Proceedings Article•DOI•
11 Nov 2008
TL;DR: It was proven that the complete binary tree might be embedded in PT(n,n).
Abstract: In this study, it was proven that the complete binary tree might be embedded in PT(n,n). One-to-one embedding was done at congestion 1, expansion eDot 5, and dilation 3(n+1)/4 + 1 by applying how to construct H-tree in mesh network. The embedding at congestion 1 was appropriate for both store-and-forward routing system and wormhole routing system, and the one-to-one embedding reduced the processor load.

3 citations


Cites background or methods from "Computational Aspects of Vlsi"

  • ...The details of H-tree making are described in [5], and how to make H-tree can be simply explained as follows:...

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  • ...The expansion of an embedding is the ratio of the number of nodes in H to the number of nodes in G[4,5]....

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  • ...In [5], the complete binary tree of odd depth was embedded into mesh at congestion 1 by using H-tree....

    [...]

Journal Article•DOI•
TL;DR: The Custom Logic toolkit for the design of VLSI custom control MOS array logic is described and the design phases supported range from the generation of behavioral and structural descriptions in high-level languages to mask-layout synthesis.
Abstract: The Custom Logic toolkit for the design of VLSI custom control MOS array logic is described. The design phases supported range from the generation of behavioral and structural descriptions in high-level languages to mask-layout synthesis.

3 citations

01 Aug 1986
TL;DR: This paper explores efficient ways to perform the beta operation as a parallel primitive on several different well known architectures, including the hypercube, and presents some lower bounds associated with the problem.
Abstract: : The ever decreasing cost of computer processors has created a great interest in multi-processor computers. However, along with the increased power that this parallelism brings, comes increased complexity in programming. One approach to lessening this complexity is to provide the programmer with general purpose parallel primitives that shield him from the structure of the underlying maching. In The Connection Machine Hillis suggests the Beta Operation as a parallel primitive for his hypercube-based machine. This paper explores efficient ways to perform this operator on several different well known architectures including the hypercube. It presents some lower bounds associated with the problem.

3 citations

Journal Article•DOI•
Evan Reid Cohn1•
TL;DR: This paper presents an efficient deterministic implementation of the multiprefix operation for the hypercube and shows that this implementation can be modified to create an implementation for the multipRefix operation without increasing the use of any of the simple primitives by more than a constant factor.

3 citations

Journal Article•DOI•
TL;DR: This paper introduces a new subclass of single instruction steam/multiple data stream (SIMD) machines, referred to as a simple SIMD, and considers an implementation of a class of simpleSIMD parallel algorithms onto systolic arrays, which have been considered as one candidate for VLSI-based cellular computers.

3 citations