Computational Aspects of Vlsi

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Computational Aspects of Vlsi

01 Jan 1984-

About: The article was published on 1984-01-01 and is currently open access. It has received 862 citations till now. The article focuses on the topics: Very-large-scale integration.

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Journal Article•DOI•

Almost exact minimum feedback vertex set in meshes and butterflies

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Flaminia L. Luccio¹•Institutions (1)

University of Milan¹

29 Apr 1998-Information Processing Letters

69 citations

Proceedings Article•DOI•

An integrated approach to parallel program debugging and performance analysis onlarge-scale multiprocessors

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Robert J. Fowler¹, Thomas J. LeBlanc¹, John Mellor-Crummey¹•Institutions (1)

University of Rochester¹

01 Nov 1988

TL;DR: A dynamic, fine-grain characterization of parallel program executions based on a partial order of accesses to shared objects forms the basis for an extensible, integrated toolkit for parallel program debugging and performance analysis.

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Abstract: One of the most serious problems in the development cycle of large-scale parallel programs is the lack of tools for debugging and performance analysis. We are addressing the problem on large-scale, shared-memory multiprocessors. We have developed a dynamic, fine-grain characterization of parallel program executions based on a partial order of accesses to shared objects. This characterization forms the basis for an extensible, integrated toolkit for parallel program debugging and performance analysis. Tools in the toolkit include an interactive debugger, a graphical execution browser, performance analysis packages, and a programmable interface for user queries. Using our integrated toolkit approach, programmers can interactively analyze the behavior of parallel programs in much the same way interactive debuggers and profilers are used to analyze the behavior of sequential programs.

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69 citations

Journal Article•DOI•

Communication complexity and convex optimization

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John N. Tsitsiklis¹, Zhi-Quan Luo¹•Institutions (1)

Massachusetts Institute of Technology¹

01 Sep 1987-Journal of Complexity

TL;DR: A situation where each one of two processors has access to a different convex function fi, i = 1, 2, defined on a common bounded domain is considered, to determine protocols under which the number of exchanged messages is minimized.

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68 citations

Cites background from "Computational Aspects of Vlsi"

...…amount of research which developed the theory further and also evaluated the communication complexity of selected combinatorial problems (Papadimitriou and Sipser, 1982; Papadimitriou and Tsitsiklis, 1982; Aho et al., 1983; Pang and El Gamal, 1986; Mehlhorn and Schmidt, 1982; Ullman, 1984)....
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...…has been in VLSI, where communication complexity constrains the amount of information that has to flow from one side of a chip to the other; this in turn determines certain trade-offs on the achievable performance of special-purpose VLSI chips for computing certain functions (Ullman, 1984)....
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...(Typically, 9 will be defined by imposing certain smoothness conditions on its elements.)...
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Journal Article•DOI•

Solving tree problems on a Mesh-connected processor Array

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Mikhail J. Atallah¹, Susanne E. Hambrusch¹•Institutions (1)

Purdue University¹

01 Apr 1986-Information & Computation

TL;DR: This paper presents techniques that result in O(√n) time algorithms for computing many properties and functions of an n-node forest stored in an √n × √ n mesh of processors.

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Abstract: In this paper we present techniques that result in O ( n ) time algorithms for computing many properties and functions of an n -node forest stored in an n × n mesh of processors. Our algorithms include computing simple properties like the depth, the height, the number of descendents, the preorder (resp. postorder, inorder) number of every node, and a solution to the more complex problem of computing the Minimax value of a game tree. Our algorithms are asymptotically optimal since any nontrivial computation will require Ω ( n ) time on the mesh. All of our algorithms generalize to higher dimensional meshes.

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67 citations

Journal Article•DOI•

Long and fast up/down counters

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Mircea R. Stan¹, A. F. Tenca², Milos D. Ercegovac³•Institutions (3)

University of Virginia¹, University of São Paulo², University of California, Los Angeles³

01 Jul 1998-IEEE Transactions on Computers

TL;DR: This paper presents recent advances in the design of constant-time up/down counters in the general context of fast counter design and reveals several methods closely related to the designs of fast adders, as well as some techniques that are only valid for counter design.

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Abstract: This paper presents recent advances in the design of constant-time up/down counters in the general context of fast counter design. An overview of existing techniques for the design of long and fast counters reveals several methods closely related to the design of fast adders, as well as some techniques that are only valid for counter design. The main idea behind the novel up/down counters is to recognize that the only extra difficulty with an up/down (vs. up-only or down-only) counter is when the counter changes direction from counting up to counting down (and vice-versa). For dealing with this difficulty, the new design uses a "shadow" register for storing the previous counter state. When counting only up or only down, the counter functions like a standard up-only or down-only constant time counter, but, when it changes direction instead of trying to compute the new value (which typically requires carry propagation), it simply uses the contents of the shadow register which contains the exact desired previous value. An alternative approach for restoring the previous state in constant time is to store the carry bits in a Carry/Borrow register.

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67 citations

Cites background from "Computational Aspects of Vlsi"

...Lower bounds on adder delay are well-known [11], [ 24 ]; intuitively, the delay of an N-bit adder is on the order O(log N) based on arguments related to tree function implementation with gates with limited fan-in, hence, the minimum clock period for such a counter is also of the order O(log N). It turns out that going again to the “black-box” model in Fig. 1a and viewing counters as state machines can result in a clock period of order O(1) ......
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Computational Aspects of Vlsi

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Cites background from "Computational Aspects of Vlsi"

Cites background from "Computational Aspects of Vlsi"

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