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Computational Aspects of Vlsi

01 Jan 1984-
About: The article was published on 1984-01-01 and is currently open access. It has received 862 citations till now. The article focuses on the topics: Very-large-scale integration.
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Journal Article
TL;DR: In this article, the usefulness of incompressibility arguments based on Kolmogorov complexity in physics of computation is discussed, including analysis of energy parsimonious "adiabatic" computation, and scalability of network architectures.
Abstract: We show the usefulness of incompressibility arguments based on Kolmogorov complexity in physics of computation by several examples. These include analysis of energy parsimonious ‘adiabatic’ computation, and scalability of network architectures.

1 citations

Proceedings ArticleDOI
22 Mar 1989
TL;DR: The author presents three hardware solutions for solving the general intersection problem and a novel solution for the 3-D containment problem using quad trees.
Abstract: The author presents three hardware solutions for solving the general intersection problem. These solutions can be implemented as an algorithm on parallel computers or special-purpose VLSI circuits can be designed. Next a solution is presented for sorting nonunique keys in O(log n) time. Finally, the author presents a novel solution for the 3-D containment problem using quad trees. >

1 citations

Journal ArticleDOI
TL;DR: Cube Connected Tree has a fixed low degree of nodes for any size of the network unlike the hypercube, which overcomes the data congestion problem near the root of the binary tree by having multiple roots in the structure, thereby enhancing the I/O bandwidth of the system.

1 citations

ReportDOI
16 May 1987
TL;DR: In this paper, efficient implementations of the DTEP algorithm are developed for the hypercube, butterfly, perfect shuffle and multi-dimensional mesh of trees families of networks.
Abstract: : The dynamic tree expression problem (DTEP) was defined in (Ma87). In this paper, efficient implementations of the DTEP algorithm are developed for the hypercube, butterfly, perfect shuffle and multi-dimensional mesh of trees families of networks.

1 citations

Journal ArticleDOI
TL;DR: The design of custom VLSIs for minimum die area, and the programmable-array implementation of a given set of completely specified Boolean functions in disjunctive normal form, are addressed.
Abstract: The design of custom VLSIs for minimum die area is dealt with. The programmable-array implementation of a given set of completely specified Boolean functions in disjunctive normal form is addressed. Two types of array are considered. The first one differs from the programmable logic array in having only the AND plane and using the series connection of MOSFETs. The second one is the Weinberger array, which employs the series–parallel connection of MOSFETs. The synthesis of networks composed of such arrays is formalized.

1 citations


Cites methods from "Computational Aspects of Vlsi"

  • ...With multilevel logic synthesis, series‐parallel transistor arrangements are employed in Weinberger arrays [2, 6 ]. Such an array represents a set of superpositions of logic functions, each of which is a negated DNF....

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