The work presents a parallel scalable VLSI algorithm for solving the first fourth-order elliptic boundary value problem on a rectangle. The VLSI complexity AT/sup 2/ of the algorithm (A-area, T-time) is expressed in terms of the problem size n/sup 2/ (the number of discretization points) and the VLSI array size p/sup 2/ (the number of processing cells). The algorithm is based on the semidirect procedure where in each iteration two discretized Poisson equations occur. The design is of a scalable form where one VLSI block performs all operations of the semidirect cycle. Its length and height is O(plogp) and O((n/sup 2//p) logn+plogp) respectively. One iteration of the semidirect process costs O((n/p)/sup 2/logn) parallel time steps. The number of iterations required to obtain a solution with an initial error reduced by O(n/sup -2/) is O(/spl radic/(nlogn)). Hence, the global estimation of this algorithm is O((n/sup 7/log/sup 5/nlogp)/p/sup 4/+(n/sup 5/1og/sup 4/nlog/sup 2/p)/p/sup 2/) in AT/sup 2/ complexity measure.

Computational Aspects of Vlsi

A scalable VLSI algorithm for the fourth-order elliptic problem

This chapter is concerned with designing algorithms for machines constructed from multiple processors.In particular, we discuss algorithms for machines in which the processors are connected to each otherby some simple, systematic, interconnection patterns. For example, consider a chess board, where eachsquare represents a processor (for example, a processor similar to one in a home computer) and everygeneric processor is connected to its 4 neighboring processors (those to the north, south, east, and west).This is an example of a mesh computer, a network of processors that is important for both theoreticaland practical reasons.The focus of this chapter is on algorithmic techniques. Initially, we deﬁne some basic termi-nology that is used to discuss parallel algorithms and parallel architectures. Following this introductorymaterial, we deﬁne a variety of interconnection networks, i ncluding the mesh (chess board), which areused to allow processors to communicate with each other. We also deﬁne an abstract parallel modelof computation, the PRAM, where processors are not connected to each other, but communicate di-rectly with a global pool of memory that is shared amongst the processors. We then discuss severalparallel programming paradigms, including the use of high-level data movement operations, divide-and-conquer, pipelining, and master-slave. Finally, we discuss the problem of mapping the structure ofan inherently parallel problem onto a target parallel architecture. This mapping problem can arise in avariety of ways, and with a wide range of problem structures. In some cases, ﬁnding a good mapping isquite straightforward, but in other cases it is a computationally intractable NP-complete problem.

/pdf/algorithmic-techniques-for-regular-networks-of-processors-tab109gl3f.pdf

Algorithmic techniques for regular networks of processors

This report explores the use of circuits as practical models for the semantics of parallel algorithms. It is shown that circuits are useful for explaining the meaning of parallel algorithms, just as a textual notation is useful for comprehending the algorithms underlying circuits. The relationship between circuits and algorithms is developed to the depth where it becomes clear that they are equivalent in expressibility. In order to express algorithms that involve re-use of resources, the concept of the data barrier is introduced and used to extend the algorithm-circuit relationship to cover pipelined and systolic circuits, in particular.

Computational Aspects of Vlsi

Citations

A scalable VLSI algorithm for the fourth-order elliptic problem

Algorithmic techniques for regular networks of processors

The Circuit Model for Parallel Algorithms

ASupercomputer Workstation forVLSICAD

VLSI-Computer: Schaltkreise aus Silizium

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