A replace operation is performed in relation to a priority queue. The priority queue has trees and elements. A first element stores a value having a greatest priority of any value stored in any element and in any tree. Each tree corresponds to one of the elements.

Computational Aspects of Vlsi

Priority queue having array and trees

Publisher Summary This chapter discusses the history of computer systems from its origins to the current state of the art, and concludes with a perspective on future computer systems. Computer systems are regarded as a composite of central processing units, storage devices, peripheral equipment, and basic system software. The chapter describes the relationships among these components as well as the factors that have influenced their design. An important distinction in computer systems is the difference between analog and digital computing. The use of analog computers predated the use of digital computers. In an analog computer, the dependent variables are represented by physical quantities such as current, voltage, number of rotations per second, and appear in continuous form. The history of analog computing devices started with the invention of the slide rule, in which the scale length is the physical analog of numbers to a logarithmic base. The main memory of a computer is commonly organized as a matrix of one-bit storage places. The instruction set of a computer is one of the most important architectural features of a computer system. One of the important functions of an operating system is to provide an interface between the applications and the computer hardware resources.

Chapter 1 Computer systems — past, present & future

In this paper the Instruction Systolic Array (ISA) is implemented using a soft systolic simulation system and a comparison given for the programming and simulation of a parallel merging program with the Processor Array (PA) and Instruction Broadcast Array (IBA). Finally the relationships between the ISA, IBA and PA VLSI computing structures are given.

Parallel merging on the Instruction Systolic Array

The problem of finding the number of intersections between two geometric figures in the plane has been studied extensively in literature. In this paper, the geometric figure comprising a continuous rectilinear path (called rectangular path) is considered, and a tight (least) upper bound onI(P, Q), the number of intersections between two rectangular pathsP andQ, is given.

A tight upper bound for the number of intersections between two rectangular paths

The increasing complexity of VLSI design process has led to an increasing use of layout
synthesis systems. For many components of a high-level synthesis system such as module
generators and module generator development environments, an accurate model of area and
delay for the layouts generated by a layout synthesis system is extremely desirable. We have
experimented with a statistical model for area and delay of function modules. This model is
surprisingly accurate for a standard cell based layout synthesis systemૼVPNR. The area of
adder and shifter modules can be modeled to with in 5% accuracy while the error in delay
model is bounded by 4%. This model can be taken through another level of indirection
without significant loss in accuracy. The area of all the modules that fit a ripple-template
(such as carry-ripple adder) can be modeled with in 30% accuracy. The delay of these
modules has a better fit, 15%. The square-template designs (such as array multiplier) have an
area model with 1.7% coeificient of variance. In these cases, the model is parametrized by
the area and delay of the leaf cells in the template.

background

/pdf/statistical-module-level-area-and-delay-estimation-33n3nxffji.pdf

Computational Aspects of Vlsi

Citations

Priority queue having array and trees

Chapter 1 Computer systems — past, present & future

Parallel merging on the Instruction Systolic Array

A tight upper bound for the number of intersections between two rectangular paths

Statistical Module Level Area and Delay Estimation

Related Papers (5)

Introduction to VLSI systems

The Design and Analysis of Computer Algorithms

Why systolic architectures

Parallel Processing with the Perfect Shuffle

Computers and Intractability: A Guide to the Theory of NP-Completeness