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Computational Aspects of Vlsi
01 Jan 1984-
About: The article was published on 1984-01-01 and is currently open access. It has received 862 citations till now. The article focuses on the topics: Very-large-scale integration.
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23 Jun 1985
TL;DR: The historical background and the major developments in the field of compaction are reviewed, emphasizing subjective evaluations rather than objective descriptions.
Abstract: Compaction is the CAD tool used to pack rough sketches or symbolic diagrams to produce IC layouts. Manual compaction is tedious, time-consuming, and error-prone; automated compaction tools can greatly shorten the layout design cycle. This paper reviews the historical background and the major developments in the field of compaction, emphasizing subjective evaluations rather than objective descriptions. The major approaches covered are constraint-graph, shear-line, and virtual-grid. Various ideas for further reducing chip area (such as inserting jog points, shortening wires, dense packing, 2-D compaction, and interactive tools) are also discussed. Because of the critical role of efficient algorithms in VLSI CAD systems, analyses of computational complexities are also included.
61 citations
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TL;DR: Some characteristics of divide-and-conquer algorithms are examined, along with some of their implications for the design of machines and languages which can support the efficient programming and execution of divided algorithms.
60 citations
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TL;DR: A heuristic graph partitioning scheme is presented to determine effective node separators for undirected graphs by improving an initial separator by an iterative strategy based on some known results from bipartite graph matching.
Abstract: A heuristic graph partitioning scheme is presented to determine effective node separators for undirected graphs. An initial separator is first obtained from the minimum degree ordering, an algorithm designed originally to produce fill-reducing orderings for sparse matrices. The separator is then improved by an iterative strategy based on some known results from bipartite graph matching. This gives an overall practical scheme in partitioning graphs. Experimental results are provided to demonstrate the effectiveness of this heuristic algorithm on graphs arising from sparse matrix applications.
60 citations
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TL;DR: The BHC topology is introduced in this paper and is shown to be a realistic characterization for a large class of interconnected data networks.
Abstract: A distributed algorithm is presented that can be used to solve the single-destination shortest path (SDSP) problem or the all-pairs shortest path (APSP) problem for a class of clustered data networks. The network graph is assumed to be characterized with a balanced hierarchically clustered (BHC) topology. The BHC topology is introduced in this paper and is shown to be a realistic characterization for a large class of interconnected data networks. For certain types of BHC topologies, the SDSP problem can be solved with computation and communication time complexities of O(log n), assuming one processor is available at each of the n number of nodes. Assuming p processors are available at each node, computation and communication time complexities of O((n/p) log n) and O(n log n) are achievable, respectively, for solving the APSP problem. It is also shown that the algorithm converges in an asynchronous environment. >
60 citations
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TL;DR: This paper gives embeddings of complete binary trees into square grids and extended grids with total vertex-congestion 1, i.e., for any vertex x of the extended grid the authors have load(x)+vertex-Congestion(x)⩽1.
59 citations