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Computational Aspects of Vlsi

01 Jan 1984-
About: The article was published on 1984-01-01 and is currently open access. It has received 862 citations till now. The article focuses on the topics: Very-large-scale integration.
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01 Jan 1988
TL;DR: The thesis introduces an Optical Model of Computation (OMC) that uses free space optics as a means of interprocessor communication; thus reducing chip costs and presents various parallel architectures as possible efficient upper bounds for v.
Abstract: Optics has become an appealing alternative to wired interconnections on several levels of communication hierarchy within computing systems. Optical chip interconnections, unlike electrical, are insensitive to mutual interference effects, are free from capacitive loading and planar constraints, and can be reprogrammable. A major goal of this thesis is to understand the computational limits in using optical communication technology in VLSI parallel processing systems. Established methodologies for studying computational complexity are applied to obtain measures that reflect true implementation costs. The computational lower founds derived using the VLSI model of computation indicate that solution to communication-intensive problems requires either a large amount of chip area or time, both of which are costly. The first part of the thesis introduces an Optical Model of Computation (OMC) that uses free space optics as a means of interprocessor communication; thus reducing chip costs. The model allows unit cost communications, and can efficiently simulate PRAM. Since OMC uses the space above and around chips for interconnects, OMC can be compared with three dimensional VLSI models in computational complexity. Any computation performed by a three dimensional VLSI organization having N processors with degree d, in time T, and volume V can be performed on OMC in volume v, and time t, where dT/N $\leq$ t $\leq$ T, and Nd $\leq$ v. The thesis presents various parallel architectures as possible efficient upper bounds for v. Each one is designed to reflect the capabilities and limitations of the device technologies used for the redirection of optical beams. Having developed the computational models, the thesis next focuses on applications in image processing and the implementation of AI problem solving techniques. A set of O(log N) pointer based algorithms for finding geometric properties of digitized images on an electro-optical mesh is introduced. The algorithms include optimal solutions for identifying and labeling figures, computing convexity properties, determining distances, etc. Another application is in the implementation of neural networks using a general purpose electro-optical cross-bar which has the potential to interconnect each of the neurons to all the others. This architecture can be modified to operate asynchronously and to realize the data-flow model.

19 citations

Journal ArticleDOI
TL;DR: It is shown that Ω(log n) is a time lower bound on the CREW-PRAM and the mesh with multiple broadcasting for the tasks of computing the perimeter, the area, the diameter, the width, the modality, the smallest-area enclosing rectangle, and the largest-area inscribed triangle of a convex n-gon.

19 citations


Cites background from "Computational Aspects of Vlsi"

  • ...Its regular interconnection topology makes the mesh eminently suitable for VLSI implementation [52]....

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Journal ArticleDOI
TL;DR: This work proves optimal upper bound on the cutwidth of the general de Bruijn graph, essentially based on a new relation between the cut width and the area of the VLSI layout of a graph.
Abstract: We prove optimal upper bound on the cutwidth of the general de Bruijn graph. Our upper bound is essentially based on a new relation between the cutwidth and the area of the VLSI layout of a graph. The relation is interesting itself as it generalizes the known relation between the area and the bisection width of graphs of bounded degrees and holds for arbitrary graphs.

19 citations

Journal ArticleDOI
TL;DR: This work proposes a nested dissection approach to finding a fundamental cycle basis in a planar graph that corresponds to a fundamental nullspace basis of the adjacency matrix, and achieves an O(n**3/2) bound on thenullspace basis size and an O-bound on the size in the special case of grid graphs.
Abstract: We propose a nested dissection approach to finding a fundamental cycle basis in a planar graph. the cycle basis corresponds to a fundamental nullspace basis of the adjacency matrix. This problem is meant to model sparse null basis computations occurring in a variety of settings. We achieve an O(n**3/2) bound on the nullspace basis size and an O(nlogn) bound on the size in the special case of grid graphs.

19 citations


Cites background from "Computational Aspects of Vlsi"

  • ...a graph that has occurred in the very large scale integration (VLSI) literature known as the H-tree [16]....

    [...]

Proceedings ArticleDOI
01 Jun 1988
TL;DR: A discussion is presented of the design and implementation of algorithms for several essential primitives: generation of completely intersected mask data, mask-to-mask Boolean operations, labeling of connected regions, and identification of width and spacing violations.
Abstract: Parallel mask verification algorithms have been developed for the Connection Machine, a massively parallel processor with up to 64K processors. A discussion is presented of the design and implementation of algorithms for several essential primitives: generation of completely intersected mask data, mask-to-mask Boolean operations, labeling of connected regions, and identification of width and spacing violations. Performance results from experiments on a 16K-processor machine are presented. Speedups between 40 and 240 over a VAX 11/785 have been measured. >

19 citations