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Computational Aspects of Vlsi
01 Jan 1984-
About: The article was published on 1984-01-01 and is currently open access. It has received 862 citations till now. The article focuses on the topics: Very-large-scale integration.
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16 Apr 2007
TL;DR: An original technique to transform functional representation of the design into a structural representation in form of a data flow graph (DFG) and shows that such constructed DFG provides a better starting point for architectural synthesis than those extracted directly from HDL specifications.
Abstract: An original technique to transform functional representation of the design into a structural representation in form of a data flow graph (DFG) is described. A canonical, word-level data structure, Taylor Expansion Diagram (TED), is used as a vehicle to effect this transformation. The problem is formulated as that of applying a sequence of decomposition cuts to a TED that transforms it into a DFG optimized for a particular objective. A systematic approach to arrive at such a decomposition is described. Experimental results show that such constructed DFG provides a better starting point for architectural synthesis than those extracted directly from HDL specifications.
17Â citations
TL;DR: An efficient VLSI architecture obtained by augmenting the Mesh with Multiple Broadcasting with precharged 1-bit row and column buses is proposed and it is shown that the MHB is extremely well-suited for solving an entire slew of digital geometry tasks.
Abstract: The first main contribution of this work is to propose an efficient VLSI architecture obtained by augmenting the Mesh with Multiple Broadcasting (MMB) with precharged 1-bit row and column buses. The new architecture, which we call Mesh with Hybrid Buses (MHB for short), is realizable in VLSI with no increase in the area or the wiring complexity of the MMB chip. Our second main contribution is to show that the MHB is extremely well-suited for solving an entire slew of digital geometry tasks. The MHB is not a reconfigurable architecture. Yet, quite remarkably, for a large number of fundamental digital geometry tasks, the MHB offers a level of performance previously attained only by reconfigurable architectures. Specifically, with a digital image pretiled onto a MHB of size /spl radic/n/spl times//spl radic/n one pixel per processor, we show that the problems of computing the convex hull of the image, computing the diameter and the width of the image, deciding whether a set of digital points is a digital line, computing the maximum distance between two images, deciding whether two images are linearly separable, computing several moments and low-level descriptors of the image, including the perimeter, area, center, and median row of its convex hull, can be solved in O(log n) time. By contrast, the fastest possible algorithms for the problems above on the MMB run in /spl Theta/(n/sup 1/6/) time. Finally, we go on to show that, with minor changes, our algorithms can be implemented to run within cost-optimality on a MHB of size /spl radic/n/log n/spl times//spl radic/n/log n.
17Â citations
Cites background or methods from "Computational Aspects of Vlsi"
...As argued in [55], the time taken to precharge a 1-bit bus is about 0....
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...In phase one of a two-phase clock cycle, we allow charge to enter the wire as suggested in [55]....
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...To implement concurrency in the s-bus broadcast, we adopt the idea of using precharged logic from [17], [55]....
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01 Jul 1990
TL;DR: A formal approach to this problem and from an algorithmic point of view optimal embeddings or equivalently nice drawings of graphs are intractable, which means that one must pay for nice drawings with a high computational effort.
Abstract: How to draw a graph? And more importantly, how to draw it nicely? As a formal approach to this problem we propose graph embeddings. A graph embedding is a mapping from a guest graph into a host graph. Graph embeddings are very rich in their descriptive capabilities. These should suffice to capture all instances from real applications in an appropriate way. Graph embeddings offer various parameters for optimizations, which are used to describe aestetics in a formal and uniform way. Thus, we measure the niceness of a drawing by the values of its aestetic parameters, such as area, width, expansion, maximal and total edge length, or non-planarity. However, in this general framework and from an algorithmic point of view optimal embeddings or equivalently nice drawings of graphs are intractable. In general, they are NP-complete, which means that one must pay for nice drawings with a high computational effort. This fact holds even for trees. To the contrary, there are drawings of trees which satisfy the upper and lower bounds up to some constant factor and are computable in polynomial time.
17Â citations
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01 Feb 1991
TL;DR: The study surveys and complements known results on the presence of cycles and long paths in graphs that have been proposed as intercon- nection networks for parallel architectures.
Abstract: We study the presence of cycles and long paths in graphs that have been proposed as intercon- nection networks for parallel architectures. The study surveys and complements known results.
17Â citations
TL;DR: A "classic" model for parallel computatio n is reviewed and some interesting work on alternative models for parallel computation is surveyed.
Abstract: If you are the type that always orders vanilla in the ice cream shop, then you should probably sta y away from parallel algorithm design, for you may never get past the fact that any given paralle l algorithm may be designed for any one of several different computational models . If, on the other hand, you are the type who thinks there are still not enough channels on cable TV, then you migh t think the number of parallel models is woefully small . If you fall into neither camp, which, accordin g to the Chernoff bounds [22], you probably should, then you may find this first SIGACT News column on parallel algorithm design of some use . For here I review a \"classic\" model for parallel computatio n and I survey some interesting work on alternative models for parallel computation .
17Â citations