Computational Aspects of Vlsi

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Computational Aspects of Vlsi

01 Jan 1984-

About: The article was published on 1984-01-01 and is currently open access. It has received 862 citations till now. The article focuses on the topics: Very-large-scale integration.

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Journal Article•DOI•

Tridiagonalization of a symmetric matrix on a square array of mesh-connected processors

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A.W. Bojanczyk¹, Richard P. Brent¹•Institutions (1)

Australian National University¹

01 Aug 1985-Journal of Parallel and Distributed Computing

TL;DR: A parallel algorithm for transforming an n × n symmetric matrix to tridiagonal form is described, which could be the first step in the parallel solution of the symmetric eigenvalue problem in time O.

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8 citations

Book Chapter•DOI•

Chapter 8 VLSI network design

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Rolf H. Möhring¹, Dorothea Wagner², Frank Wagner³•Institutions (3)

Technical University of Berlin¹, University of Konstanz², Free University of Berlin³

01 Jan 1995

TL;DR: This chapter deals with special layout technologies that usually occur in logic synthesis, i.e. in the construction of the physical components that are given for the layout and routing phases, and reveals some rich and surprising connections to independent and currently very active areas of graph theory.

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Abstract: Publisher Summary This chapter discusses VLSI design. The interaction between integrated circuit layout and combinatorial optimization is discussed. The viewpoint taken is that of a combinatorialist, which means that main emphasis is given to aspects of circuit layout that are theoretically well understood and/or belong currently to the most prominent combinatorial problems in circuit layout. The chapter discusses general layout problem. In this overall approach, the physical components of the chip are considered as given together with their interconnection structure, the so-called "net lists." It aims at placing components and routing the nets simultaneously. The main optimization goal is to minimize the layout area. The routing phase which usually follows the placement is also discussed. In this phase, the physical components have already been placed, and the wiring between these components has to be laid out. The routing problem is usually divided into two subproblems, the layout problem and the layer assignment or wiring problem. The chapter deals with special layout technologies that usually occur in logic synthesis, i.e. in the construction of the physical components that are given for the layout and routing phases. This so-called linear layout method reveal some rich and surprising connections to independent and currently very active areas of graph theory such as graph searching, Robertson-Seymour theory, embedding graphs into interval graphs, and graph separation.

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8 citations

Book Chapter•DOI•

On two-dimensional mesh networks and their simulation with p systems

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Rodica Ceterchi¹, Mario de Jesús Pérez Jiménez²•Institutions (2)

University of Bucharest¹, University of Seville²

14 Jun 2004

TL;DR: This paper analizes the possibility of simulating the parallel architecture SIMD−MC2, also known as the two-dimensional mesh, with P systems with dynamic communication graphs, and shows how to extend the formalism to the reduction problem.

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Abstract: We analize in this paper the possibility of simulating the parallel architecture SIMD−MC2, also known as the two-dimensional mesh, with P systems with dynamic communication graphs. We illustrate this simulation for an algorithm which computes the sum of given integers. Next, we show how to extend the formalism to the reduction problem.

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8 citations

Cites background from "Computational Aspects of Vlsi"

...Quinn [8], quoting Ullman [9], mentions six important processor organizations, among which the mesh network....
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Journal Article•DOI•

Flux, sorting, and supercomputer organization for AI applications

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Jeffrey D. Ullman¹•Institutions (1)

Stanford University¹

01 Nov 1984-Journal of Parallel and Distributed Computing

TL;DR: The authors consider organizations that are suitable for fast sorting, both those that use point-to-point connections and those that connect processors with multipoint nets, and show that nets must connect at least ..sqrt..n nodes each, if the network has n nodes.

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8 citations

Cites background from "Computational Aspects of Vlsi"

...Unfortunately, it appears that the fifth-generation project has not gotten beyond the standard sort (or binsort) approach to taking joins (see Ullman [24] for a discussion of methods for joining)....
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...These and similar networks, their relationships, and their sorting algorithms are covered generally in Siegel [ 191 and Ullman [25]....
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...For example, it is essential for computing joins in relational database systems (see Ullman [24], Maier [ 1 l]), because each tuple of one relation may have to be compared with any or all of the tuples in the other relation (although techniques such as “semijoins” reduce the need for communication in some cases)....
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Journal Article•DOI•

Branching programs provide lower bounds on the areas of multilective deterministic and nondeterministic VLSI-circuits

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Juraj Hromkovic¹, Matthias Krause², Christoph Meinel², Stephen Waack•Institutions (2)

Comenius University in Bratislava¹, Humboldt University of Berlin²

01 Feb 1992-Information & Computation

TL;DR: Lower bounds are derived for the sequence equality problem (SEQ) and the graph accessibility problem (GAP) for VLSI-circuits computing explicitly defined one-output Boolean functions, if the multiplicity of reading is bounded by O(logαn).

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Abstract: Each (nondeterministic) multilective VLSI-circuit C of area A can be simulated by an oblivious (disjunctive) branching program of width exp(O(A)) which has the same multiplicity of reading as C. That is why exponential lower bounds on the width of (disjunctive) oblivious branching programs of linear depth provide lower bounds of order Ω(n1–2α), 0≤α<12, on the area of (nondeterministic) multilective VLSI-circuits computing explicitly defined one-output Boolean functions, if the multiplicity of reading is bounded by O(logαn). Lower bounds are derived for the sequence equality problem (SEQ) and the graph accessibility problem (GAP).

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8 citations

Cites methods from "Computational Aspects of Vlsi"

...MULTILECTIVE VLSI-CIRCUITS Recall the definition of multilective VLSI-circuits given, e.g., in Ullman (1984) or HromkoviE (1988)....
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...In Section 2 we recall the definition of multilective VLSI-circuits (see, for example, Ullman (1984), Hromkovic (1988)) and introduce the corresponding nondeterministic VLSI-circuit model....
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Computational Aspects of Vlsi

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