896 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 6, JUNE 2001
Concepts and Methods in Optimization of Integrated
LC VCOs
Donhee Ham, Student Member, IEEE, and Ali Hajimiri, Member, IEEE
Abstract—Underlying physical mechanisms controlling the
noise properties of oscillators are studied. This treatment shows
the importance of inductance selection for oscillator noise op-
timization. A design strategy centered around an inductance
selection scheme is executed using a practical graphical optimiza-
tion method to optimize phase noise subject to design constraints
such as power dissipation, tank amplitude, tuning range, startup
condition, and diameters of spiral inductors. The optimization
technique is demonstrated through a design example, leading to a
2.4-GHz fully integrated, LC voltage-controlled oscillator (VCO)
implemented using 0.35-
m MOS transistors. The measured
phase-noise values are
121, 117, and 115 dBc/Hz at 600-kHz
offset from 1.91, 2.03, and 2.60-GHz carriers, respectively. The
VCO dissipates 4 mA from a 2.5-V supply voltage. The inversion
mode MOSCAP tuning is used to achieve 26% of tuning range.
Two figures of merit for performance comparison of various
oscillators are introduced and used to compare this work to
previously reported results.
Index Terms—Analog integrated circuits, CMOS integrated cir-
cuits,
oscillators, optimization, phase noise, radio frequency,
voltage-controlled oscillators.
I. INTRODUCTION
I
NTEGRATED LC voltage-controlledoscillators (VCOs) are
common functional blocks in modern radio frequency com-
munication systems and are used as local oscillators to up- and
downconvert signals. Due to the ever-increasing demand for
bandwidth, very stringent requirements are placed on the spec-
tral purity of local oscillators. Effortsto improvethe phase-noise
performance of integrated LC VCOs have resulted in a large
number of realizations [1]–[23]. Despite these endeavors, de-
sign and optimization of integrated LC VCOs still pose many
challenges to circuit designers as simultaneous optimization of
multiple variables is required.
A computer-aided optimization technique using geometric
programming has been recently used to find the optimum de-
sign for certain LC oscillator topologies efficiently [24], [25].
Despite its efficiency, it provides limited physical insight into
choosing the optimum design, as it completely relies on the
computer to perform the optimization. Therefore, even in the
presence of such CAD tools, firm understanding of the under-
lying tradeoffs among the design parameters is essential to en-
hance circuit innovations and increase design productivity. This
is especially important when the number of design parameters
Manuscript received June 21, 2000; revised January 2, 2001. This work was
supported in part by a fellowship from IBM Corporation.
The authors are with the Department of Electrical Engineering, California
Institute of Technology, Pasadena, CA 91125 USA.
Publisher Item Identifier S 0018-9200(01)04135-X.
Fig. 1. Steady-state parallel LC oscillator model.
is large, as any optimization tool unjustifiably exploits the limi-
tations of the models used.
To address this issue, we consider underlying physics of LC
oscillators in this paper, concluding that inductance selection
process plays a central role in oscillator noise optimization. An
investigation of phase-noise properties leads to a design strategy
based on an inductance selection scheme, providing a basis for a
detailed optimization methodology presented later in this work.
This optimization process entails an intuitive graphical method
to visualize the design constraints such as tank amplitude, fre-
quency tuning range, and startup condition, allowing minimiza-
tion of phase noise while satisfying all design constraints.
Section II studies LC oscillators from a physical standpoint,
providing essential insights into the noise characteristics of LC
oscillators. In Section III,a specific oscillator topology ischosen
as a design example and design constraints are imposed on the
oscillator. The inherent properties of phase noise lead to a design
strategy. Section IV explains the details of our graphical opti-
mization process. Elaborate simulation results of the optimized
VCO accurately predicting phase noise are shown in Section V.
Section VI presents the experimental results and compares the
performance of our VCO to that of other reported LC oscillators
to prove the adequacy of our design methodology.
II. U
NDERLYING PHYSICS OF LC OSCILLATORS
In this section, we will perform a simplified analysis of oscil-
lator noise to obtain essential understanding of the basic trade-
offsinan LC oscillator using the noise-to-carrier ratio (NCR) as
a measure of oscillator performance. A more accurate approach
leading to a design strategy for phase-noise optimization will
be presented in Section III. Although the following argument is
limited to the oscillators with parallel LC tanks, a series tank can
be analyzed using a dual line of argument.
A. Oscillator Voltage Amplitude
Fig. 1 shows the model for a parallel LC oscillator in steady
state, where the conductance
represents the tank loss and
is the effective negative conductance of the active de-
vices that compensates the losses in the tank.
0018–9200/01$10.00 © 2001 IEEE
HAM AND HAJIMIRI: OPTIMIZATION OF INTEGRATED LC VCOS 897
Fig. 2.
E
versus
L
curvesobtained from (2) for two different tank energies
E
>E
. With an increasing inductance, the tank amplitude grows
along the solid parts of the curves until it reaches
V
(inductance-limited
regime). Once the tank amplitude reaches
V
, it stops growing with the
further increase of inductance (voltage-limitedregime). The parts of curves with
broken lines are unrealizable.
Two modes of operation, named current- and voltage-limited
regimes, can be identified for a typical LC oscillator consid-
ering the bias current as the independent variable [18]. In the
current-limited regime, the tank amplitude
linearly grows
with the bias current according to
until the
oscillator enters the voltage-limited regime. In the voltage-lim-
ited regime, the amplitude is limited to
, which is deter-
mined by the supply voltage and/or a change in the operation
mode of active devices (e.g., MOS transistors entering triode
region). Thus,
can be expressed as
-limited)
-limited).
(1)
These two modes of operation can be viewed from a different
perspective, by using the tank inductance
as the independent
variable instead of
. Noting that the tank energy is
defined as
, can be expressed in terms
of
, i.e.
(2)
where
is the oscillation frequency. The tank
amplitude grows with
for given and as indicated
by (2) and depicted in Fig. 2 for two different tank energies
. While being the same as the current-lim-
ited regime, we refer to this mode as inductance-limited regime
when
is the independent variable. Therefore, any equation
valid in the current-limited regime must be valid in the induc-
tance-limited regime and vice versa. This alternative denomi-
nation will facilitate the understanding of various tradeoffs in
oscillator design throughout this work. Once the tank amplitude
reaches
, it stops increasing with further increase of the in-
ductance and the oscillator will enter the voltage-limited regime
as before.
Note that many different inductors with the same inductance,
, can be made in any technology. For example, different
on-chip spiral inductors with the same
can be designed
using different geometric parameters such as diameter, number
of turns, etc. [24]. However, only one of these designs will
offer the minimum loss, or the smallest equivalent parallel
conductance,
. Unless otherwise specified, from this point
on, whenever we refer to an inductance
, we assume that
this optimization is already performed [24] and hence
corresponds to the inductor with the minimum loss. Note that
the minimum loss
is a function of .
The equivalence of the current- and inductance-limited
regimes can be used to combine (1) and (2) to determine the
relation between
and in the inductance-limited
regime. Assuming that the losses due to the on-chip spiral
inductors are dominant in the integrated LC oscillators, (i.e.,
)
-limited) (3)
While (2) is valid in both inductance- and voltage-limited
regimes, it is easier to deal with a constant quantity
in
the voltage-limited regime, and hence we can rewrite (2) as
-limited)
-limited)
(4)
B. Oscillator Voltage Noise
The equipartition theorem of thermodynamics [26] states that
at absolute temperature
, each independent degree of freedom
for a system in equilibrium has a mean energy of
. For in-
stance, noting that in a parallel RC circuit, only one independent
initial condition can be defined for the capacitor, the equiparti-
tion theorem states that
, which leads to the
well-known
noise, i.e.
(5)
In the parallel LC oscillator of Fig. 1, the voltage noise
in
the capacitor and the current noise
in the inductor are gener-
ally correlated and do not represent two independent degrees of
freedom. However, we may still apply the equipartition theorem
to the oscillator as a first-order approximation to obtain
(6)
which showsthe
dependence of the mean squared voltage
noise across the parallel LC tank. In other words, for a given os-
cillation frequency, the mean squared voltage noise is propor-
tional to the inductance, which is valid in both inductance- and
voltage-limited regimes.
One important observation is that the oscillator has a similar
response to both the tank energy
and the thermal energy
, as expected intuitively and indicated by (2)
and (6), respectively.
C. Noise-to-Carrier Ratio (NCR) and a Mechanical Analogy
Using (4) and (6), we can express the NCR of an LC oscillator
for a given oscillation frequency as
( -limited)
( -limited).
(7)
Equation (7) shows that although
increases with for a
given
, as seen in Fig. 2, the NCR stays constant in the in-
898 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 6, JUNE 2001
ductance-limited regime and does not depend on the value of the
inductor. However, once the oscillator enters the voltage-lim-
ited regime, the NCR increases with
. Therefore, choosing an
inductance
that places the oscillator in the voltage-limited
regime results in waste of inductance and will only increase
the NCR. An important observation is that for a given
,
a larger tank amplitude obtained by increasing the inductance
does not result in a better noise performance because the os-
cillator has a similar response to both the tank energy and the
thermal energy, as noted earlier. On the other hand, the NCR
can indeed be improved by increasing the tank energy, as can
be seen from (7), which will inevitably result in larger power
dissipation.
We can draw a mechanical analogy to the LC oscillator to
help us understand the dependence of the NCR on the value of
the inductor. Consider a mass-spring oscillator in which a mass
is fastened to one end of a spring with a spring constant ,
while the other end of the spring is kept stationary. The mass
is immersed in water and subject to random bombardment of
water molecules. The loss due to the water friction is compen-
sated by a hand which follows the oscillation of the mass and
continuously injects compensating energy into the system. The
hand is assumed to have undesirable yet inherent shaking.
The comparison between the differential equations for the ve-
locity of the mass and the voltage across the parallel LC tank re-
veals the analogy of the mass
and the spring constant to the
capacitance
and the inverse of the inductance , respec-
tively. The mass velocity corresponds to the voltage across the
parallel LC tank. The random bombardment of water molecules
and the hand shaking correspond to the tank noise and the ac-
tive device noise, respectively. The hand can only make limited
displacements and never allows the mass to exceed its range.
This introduces an upper bound for the maximum displacement
and hence the maximum velocity of the mass,
1
resulting in a ve-
locity-limited regime as an analog to the voltage-limited regime.
As expected intuitively, the mass of the oscillator has a sim-
ilar response to the oscillation energy and the thermal energy.
Therefore, a smaller mass results in a larger maximum velocity,
a larger velocity noise, and hence a constant noise-to-signal ratio
for a given oscillation energy until the oscillation reaches the ve-
locity-limited regime. In the velocity-limited regime, a reduc-
tion in mass degrades the noise-to-signal ratio as the velocity
noise keeps increasing while the maximum velocity stays con-
stant.
D. Fundamental Relation between Loss and Noise
An oscillator can be viewedas an energy conversion engine as
shownin Fig. 3. In an oscillator, the activedevice acts as a means
to transfer energy from the dc power supply to the resonator and
convert it from dc to ac. As pointed out in the previous subsec-
tion, a larger
results in a better NCR. Therefore, every ef-
fort should be made to maximize the energy transfer efficiency
of active devices (see Fig. 3), as it will directly increase the tank
energy of the resonator. The energy loss in the active device is
usually a strong function of its voltage and current waveforms
and the energy transfer efficiency can be improved by proper
1
Noting that
kx =
2=
mv =
2
.
Fig. 3. LC oscillator as an energy conversion engine. The energy transfer
efficiency of the active device can be defined as (
P
0
P
)/
P
.
timing of the voltage and current as in certain oscillator topolo-
gies, such as Colpitts [27].
It has been shown that such efficient operation of active de-
vices is closely linked to the exploitation of cyclostationarity to
reduce noise contributions from active devices [27]. This oper-
ational perspective can be viewed from a fundamental angle. In
any physical system, loss components and noise have an inti-
mate connection, because any quantity representing dissipation
such as resistance is the macroscopic average of a large number
of microscopic fluctuating components. The fluctuation-dissi-
pation theorem of statistical physics states the proportionality
of noise and loss parameters and provides the associated pro-
portionality constant [26]. The reduced energy loss in the active
device by proper timing implies an enhanced screening of res-
onator from the loss components in the active devices, which
will directly reduce active device’s fractional noise contribu-
tion to the resonator according to the fluctuation-dissipation the-
orem. This explains the underlying physics for the active device
noise reduction due to cyclostationary effects [27].
E. Design Insights
Although (7) provides essential insights into the oscillator
noise as a function of
, the bias current is a more
practical design parameter for electrical oscillators. To that end,
we convert (7) into
-limited)
-limited)
(8)
by using (3).
Two important concepts of waste of inductance and waste of
power in the voltage-limited regime can be seen from (8). In-
creasing
beyondthe value that puts the oscillator at the edge of
the voltage-limited regime will degrade the NCR in proportion
to the excess inductance, and hence will result in waste of induc-
tance. Neglecting this distinction between the voltage- and in-
ductance-limited regimes can lead to noise optimization guide-
lines promoting maximization of
[6]. Similarly, increasing the
bias current in excess of the value that places the oscillator at
the borderline of the two regimes will not improve the NCR and
therefore induces the more commonly appreciated concept of
waste of power.
HAM AND HAJIMIRI: OPTIMIZATION OF INTEGRATED LC VCOS 899
Fig. 4.
L
g ;V
, and NCR versus
L
for a given
I
. (a)
Lg
increasing
with an increasing inductance
L
. (b)
Lg
decreasing with an increasing
inductance
L
.
Based on (8), the optimum NCR for a given bias current is
obtained in the inductance-limited regime when
assumes
its minimum value. The specific behavior of
with the in-
ductance has a strong dependence on the particular implemen-
tation of the inductor. Now, we investigate two hypothetical, yet
illustrative, cases to show how the optimum inductance for the
optimum NCR can be obtained for a given
.
Case 1)
increasing with : First, we consider the case in
which
increases with the inductance. As can be
seen from (8), a smaller inductance results in a better
NCR for a given bias current. However, the induc-
tance cannot be reduced indefinitely since in prac-
tice, we alwayshavea minimum tank amplitude con-
straint
and/or a startup condition.
The excessive reduction of inductance will even-
tually violate the minimum tank amplitude or the
startup constraint. Consequently, the optimum in-
ductance for the optimum NCR is determined when
the design lies at the verge of the tank amplitude
or startup constraint.
2
Hypothetical curves for ,
, and NCR versus for a fixed bias current in
this case are shown in Fig. 4(a), where the minimum
tank amplitude constraint is the limiting mechanism
for this reduction.
2
The startup constraint is normally imposed by specifying the minimum
small-signal loop gain between 2 and 3. Hence, the design at the verge of the
startup constraint still has a sufficient margin on the loop gain.
Fig. 5. VCO core schematic.
Case 2) decreasing with : Now we consider the case
where
decreases with increasing inductance. In
this case, (8) shows that a larger inductance in the in-
ductance-limited regime results in a better NCR for
a given bias current. Hence, the optimum inductance
for the optimum NCR is the one that places the de-
sign at the edge of the inductance-limited regime, as
seen in hypothetical curves for
, , and NCR
versus
for a fixed bias current of Fig. 4(b).
F. Phase Noise Versus NCR
The NCR was used in this section to investigate the general
properties of oscillator noise. While being informative, the NCR
lacks specific information on the frequency dependence of noise
or its conversion mechanism.Unlike the NCR, phase noise bears
spectral information about the oscillator noise and thus assumes
adifferentmathematicalexpressionfrom (8). Nevertheless,sim-
ilar central concepts, such as waste of power, waste of induc-
tance, power–noise tradeoff, and the importance of the induc-
tance selection will reappear in expressions for phase noise, as
will be seen later in Section III. Now, a more detailed design
strategy based upon specific noise properties of a practical LC
oscillator will be developed through a design example in the fol-
lowing section.
III. LC VCO T
OPOLOGY,DESIGN CONSTRAINTS, AND DESIGN
STRATEGY
In this section, we demonstrate the design strategy through
the oscillator topology of Fig. 5. Design constraints are specified
and a design strategy specific to the circuit is devised for phase-
noise optimization.
A. Design Topology
The cross-coupled LC oscillator of Fig. 5 is selected as a ve-
hicle to demonstrate our optimization process. Full exploitation
900 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 6, JUNE 2001
TABLE I
T
WELVE INITIAL DESIGN VARIABLES
Fig. 6. Equivalent oscillator model.
of differential operation lowers undesirable common-mode ef-
fects such as extrinsic substrate and supply noise amplification
and upconversion. The oscillation amplitude of this structure is
approximately a factor of two larger than that of the nMOS-only
structure due to the pMOS pair [18], [28], [29]. The rise and
fall time symmetry is also incorporated to further reduce the
noise upconversion [27]. These properties result in a better
phase-noise performance for a given tail current.
There are twelve initial design variables associated with
this specific oscillator: MOS transistors dimensions (
,
, , and ), geometric parameters of on-chip spiral
inductors (metal width
, metal spacing , number of turns
, and diameter ), maximum and minimum values of the
varactors (
and ), load capacitance ( ) and
tail bias current in the oscillator core (
). These design
variables are listed in Table I. Later, we will reduce the number
of independent design variables to six through proper design
considerations.
The equivalent circuit model of the oscillator is shown in
Fig. 6 [25], where the broken line in the middle represents either
the common mode or ground. The symmetric spiral inductor
Fig. 7. Symmetric spiral inductor model.
Fig. 8. LC tank and MOSCAP varactor.
model of Fig. 7 [30] with identical RC loading on both termi-
nals is used as a part of the tank model. Varactors for frequency
tuning are made out of the gate channel capacitor of standard
pMOS transistors in inversion mode. They are modeled with a
capacitor
in series with a resistor as in Fig. 8, which is
used as a part of the tank model.
In Fig. 6,
and are the total parasitic capac-
itances of the nMOS and pMOS transistors, respectively,
3
and
and are small-signal transconductance and output con-
ductance of the transistors, respectively. Although the values of
and vary with the change of the operating points of tran-
sistors in the course of oscillation, we will use the values of
and when the voltage across the LC tank is zero. This ap-
proximation facilitates the analytical expression of design con-
straints. We will justify that the approximation does not mislead
the design shortly. All the electrical parameters in the equivalent
circuit model can be expressed in terms of design variables, by
utilizing existing formulae for transistor parameters and on-chip
resonator parameters [24], [25].
The frequently appearing parameters in our optimization
process are the tank loss
, effective negative conductance
, tank inductance , and tank capacitance of
Fig. 1, given by
(9)
(10)
(11)
(12)
respectively, where
and are the effective parallel conduc-
tance of the inductors and varactors, respectively.
4
As and
assume certain range of valuesas the varactorcapacitance
varies, their maximum and minimum values will be denoted by
subscripts
and .
3
C
=
C
+
C
+4
C
,
C
=
C
+
C
+4
C
.
4
g
=1
=R
+
R =
(
L!
)
and
g
=(
C !
)
=Q
.