# Cost-effective optimization of serial link system for Signal Integrity and Power Integrity

14 Mar 2011-pp 1-5

TL;DR: HSLINK system is optimized for better SI and PI and linear models for eye amplitude and jitter are derived by Design of Experiments (DOE) and cost effective solution strategy is presented using linear models obtained.

Abstract: Signal Integrity (SI) and Power Integrity (PI) are the most inportant characteristics for system level design, simulation and analysis of high speed systems. In this paper, HSLINK system is optimized for better SI and PI. Linear models for eye amplitude and jitter are derived by Design of Experiments (DOE). Cost effective solution strategy is also presented using linear models obtained.

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TL;DR: A model is developed to optimize the performance of high speed serial link in terms of jitter and amplitude performance and Taguchi array optimization has been applied during the optimization process.

Abstract: System level signal integrity and power integrity problems for high speed serial links have been explored in this paper. An example of the USB 2.0 IP has been used in this paper, but the analysis is generic for all serial links. This paper considers signal and power integrity as effects simultaneoulsy. A model is developed to optimize the performance of high speed serial link in terms of jitter and amplitude performance. Sensitivity analysis is carried out with a set of dependent parameters affecting the performance. Taguchi array optimization has been applied during the optimization process. Finally, reflection gain concept is also applied to further improve the performance for the eye diagram. A strong correlation between measured and simulated results is shown. A generic methodology for SI and PI for high speed serial links is presented with complete analysis of package, board, termination, squidd card, decoupling network etc. Index Terms—Signal integrity, power integrity, serial links, bit error rate (BER), high speed data transmission

7 citations

##### References

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IBM

^{1}TL;DR: In this article, an efficient statistical analysis methodology for system-level signal integrity analysis is discussed, where statistical variations of the design and operational parameters are mapped to system performance through simulations based on orthogonal Taguchi arrays.

Abstract: This paper discusses an efficient statistical analysis methodology for system-level signal integrity analysis. In the proposed method, statistical variations of the design and operational parameters are mapped to system performance through simulations based on orthogonal Taguchi arrays. Using the sensitivity functions derived from these simulations, statistical distributions of the performance measures are computed. The sensitivity functions and probability distributions of the design parameters are utilized as a diagnosis tool to estimate the design parameters of a system for a given measured performance. The statistical methodology is applied for design space exploration to improve system performance. For demonstrating the concept, a source synchronous memory bus and a peripheral input-output (I/O) bus have been analyzed under design and operational variations.

56 citations

### "Cost-effective optimization of seri..." refers background or methods in this paper

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01 Jan 2002

TL;DR: In this paper, a rigorous engineering book detailing the gritty, statistical work involved in making the Six Sigma process work in the electronics industry is presented. Six Sigma is a customer-based manufacturing approach to realize fewer defects and thus lowering costs and increasing customer satisfaction.

Abstract: Six Sigma is a customer-based manufacturing approach to realizing fewer defects and thus lowering costs and increasing customer satisfaction. This is a rigorous engineering book detailing the gritty, statistical work involved in making the Six Sigma process work in the electronics industry.
Table of contents
Chapter 1:
The nature of 6 Sigma and its connectivity to other quality tools Chapter 2:
The elements of 6 Sigma and their determination Chapter 3:
Six Sigma and the manufacturing control systemsChapter 4:
The use of 6 sigma in determining the manufacturing yield and test strategy Chapter 5:
The use of 6 sigma with high and low volume products and processesChapter 6:
Six Sigma quality and manufacturing costs of electronics productsChapter 7:
Six Sigma and Design of Experiments (DoE)Chapter 8:
Six Sigma and its use in the analysis of design and manufacturing for current and new products and processesChapter 9:
Six Sigma and the new product lifecycleChapter 10:
New product and systems project management using Six Sigma quality Chapter 11:
Implementing Six Sigma in electronics design and manufacturing

54 citations

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TL;DR: A systematic approach of statistical modeling is developed to analyze and model statistical variations of CMOS transistor model parameters for statistical circuit simulation and its accuracy and efficiency are verified.

Abstract: A systematic approach of statistical modeling is developed to analyze and model statistical variations of CMOS transistor model parameters for statistical circuit simulation. The proposed methodology is based on several standard statistical techniques, and its accuracy and efficiency are verified by several examples. The efficiency of the method lies in the reduction of dimensions of parameter space without losing much statistical information. >

30 citations

### "Cost-effective optimization of seri..." refers background in this paper

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TL;DR: In this article, the sources, propagation of noise and sensitivity of MOS circuits are presented and its trend in the next technology generations is evaluated, and the challenges that modeling techniques and CAD tools have to face are commented.

Abstract: Noise caused by the activity of integrated circuits is a limiting factor for the development of future VLSI circuits. Transients of voltages and currents couple perturbations to the co-integrated circuits where the most effective medium to propagate noise is the silicon substrate. The effect is especially important where high-speed digital circuits are integrated together with highly sensitive analog sections, which is the case of modern communication transceivers. Taking into account the effect of noise during the circuit design requires a fine electrical modeling of the substrate and noise generation. The capability of substrate to propagate signals from DC to very high frequencies has to be understood and modeled, together with the role of doping profile and topology of doped regions (layout). In this tutorial paper the sources, propagation of noise and sensitivity of MOS circuits are presented and its trend in the next technology generations is evaluated. The challenges that modeling techniques and CAD tools have to face are commented, and the key points and more likely solutions are discussed.

22 citations

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TL;DR: In this paper, the authors define the three important aspects of power integrity (PI), sufficiency, efficiency, and stability, and present how the power delivery system (PDS) can be designed, modeled, analyzed, and verified in a CAD environment.

Abstract: This paper defines the three important aspects of power integrity (PI), sufficiency, efficiency, and stability; and presents how the power delivery system (PDS) can be designed, modeled, analyzed, and verified in a CAD environment.

13 citations

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