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Defect and Fault Tolerance in VLSI Systems

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The article was published on 2003-01-01 and is currently open access. It has received 80 citations till now. The article focuses on the topics: Fault tolerance.

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Proceedings ArticleDOI

Survey of low power testing of VLSI circuits

TL;DR: Low power dissipation during test application is becoming increasingly important in today's V LSI systems design and is a major goal in the future development of VLSI design.
Posted Content

Hard Data on Soft Errors: A Large-Scale Assessment of Real-World Error Rates in GPGPU

TL;DR: In this paper, the authors present a large-scale assessment of GPU error rate, conducted by running MemtestG80 on over 20,000 hosts on the Folding@home distributed computing network.
Book ChapterDOI

High-Performance Concurrent Error Detection Scheme for AES Hardware

TL;DR: The proposed error detection scheme was applied to AES and can be applied to other algorithms efficiently and was estimated to be 14.5% at maximum.
Journal ArticleDOI

Magnetic cellular automata coplanar cross wire systems

TL;DR: In this paper, a coplanar cross wire layout for magnetic cellular automata (MCA) was designed and implemented via two ferromagnetic coupled coplanars crossing wires and demonstrated all possible logic combinations.
References
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Proceedings ArticleDOI

Survey of low power testing of VLSI circuits

TL;DR: Low power dissipation during test application is becoming increasingly important in today's V LSI systems design and is a major goal in the future development of VLSI design.
Proceedings ArticleDOI

Hard Data on Soft Errors: A Large-Scale Assessment of Real-World Error Rates in GPGPU

TL;DR: MemtestG80, the software for assessing memory error rates on NVIDIA graphics cards, is presented and it is shown that, in their installed environments, two-thirds of tested GPUs exhibit a detectable, pattern-sensitive rate of memory soft errors.
Book ChapterDOI

High-Performance Concurrent Error Detection Scheme for AES Hardware

TL;DR: The proposed error detection scheme was applied to AES and can be applied to other algorithms efficiently and was estimated to be 14.5% at maximum.
Journal ArticleDOI

Magnetic cellular automata coplanar cross wire systems

TL;DR: In this paper, a coplanar cross wire layout for magnetic cellular automata (MCA) was designed and implemented via two ferromagnetic coupled coplanars crossing wires and demonstrated all possible logic combinations.