Delay and Jitter Characterization for Software-Based Clock Synchronization Over WLAN Using PTP
TL;DR: For the first time, the individual sources of delay and jitter are investigated for an IEEE 802.11 wireless local area network (WLAN) synchronization system using the IEEE 1588 protocol and software timestamps and results show that with optimal error compensation, a similar synchronization performance as software-based synchronization in Ethernet networks can be achieved.
Abstract: In distributed systems, clock synchronization performance is hampered by delays and jitter accumulated not only in the network, but also in the timestamping procedures of the devices being synchronized. This is particularly critical in software timestamp-based synchronization where both software- and hardware-related sources contribute to this behavior. Usually, these synchronization impairments are collapsed into a black-box performance figure without quantifying the impact of each individual source, which obscures the picture and reduces the possibility to find optimized remedies. In this study, for the first time, the individual sources of delay and jitter are investigated for an IEEE 802.11 wireless local area network (WLAN) synchronization system using the IEEE 1588 protocol and software timestamps. Novel measurement techniques are proposed to quantify the hardware- and software-related delay and jitter mechanisms. It is shown that the delays and their associated jitter originate from both the WLAN chipset and the host computer. Moreover, the delay from the chipset cannot be considered symmetric and any such assumption inevitably leads to a residual offset, and thus to synchronization inaccuracy. Therefore, a calibration-based approach is proposed to compensate for these delays and to improve the performance of WLAN synchronization. Experimental results show that with optimal error compensation, a similar synchronization performance as software-based synchronization in Ethernet networks can be achieved.
Citations
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TL;DR: The standardized protocols and technologies for providing synchronization of devices connected by packet-switched networks are surveyed and a review of synchronization impairments and the state-of-the-art mechanisms to improve the synchronization accuracy are presented.
Abstract: Clock synchronization is a prerequisite for the realization of emerging applications in various domains such as industrial automation and the intelligent power grid. This paper surveys the standardized protocols and technologies for providing synchronization of devices connected by packet-switched networks. A review of synchronization impairments and the state-of-the-art mechanisms to improve the synchronization accuracy is then presented. Providing microsecond to sub-microsecond synchronization accuracy under the presence of asymmetric delays in a cost-effective manner is a challenging problem, and still an open issue in many application scenarios. Further, security is of significant importance for systems where timing is critical. The security threats and solutions to protect exchanged synchronization messages are also discussed.
110 citations
TL;DR: This survey looks into the details of synchronization over IEEE 802.11 with a particular focus on the infrastructure mode which is most relevant for industrial use cases and highlights the different parameters which affect the performance of clock synchronization over WLAN and compares the performances of existing synchronization methods to analyze their shortcomings.
Abstract: Just like Ethernet before, IEEE 802.11 is now transcending the borders of its usage from the office environment toward real-time communication on the factory floor. However, similar to Ethernet, the availability of synchronized clocks to coordinate and control communication and distributed real-time services is not a built-in feature in WLAN. Over the years, this has led to the design and use of a wide variety of customized protocols with varying complexity and precision, both for wired and wireless networks, in accordance with the increasingly demanding requirements from real-time applications. This survey looks into the details of synchronization over IEEE 802.11 with a particular focus on the infrastructure mode which is most relevant for industrial use cases. It highlights the different parameters which affect the performance of clock synchronization over WLAN and compares the performance of existing synchronization methods to analyze their shortcomings. Finally, it identifies new trends and directions for future research as well as features for wireless clock synchronization which will be required by the applications in the near future.
108 citations
Cites background from "Delay and Jitter Characterization f..."
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...Moreover, choosing a smaller value for kp and ki results in poles with large magnitudes in (11) which lead to larger loop settling times....
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TL;DR: This paper describes reference broadcast infrastructure synchronization (RBIS), a clock synchronization protocol for IEEE 802.11 infrastructure wireless networks, especially tailored for industrial and home automation networks, and in many application contexts, it offers several advantages compared with other solutions targeted at similar purposes.
Abstract: This paper describes reference broadcast infrastructure synchronization (RBIS), a clock synchronization protocol for IEEE 802.11 infrastructure wireless networks. The protocol is especially tailored for industrial and home automation networks, and in many application contexts, it offers several advantages compared with other solutions targeted at similar purposes. RBIS has been conceived to rely on conventional Wi-Fi equipment and, in particular, on unmodified access points. It is based on the master/slave approach and follows the receiver/receiver paradigm. An implementation of RBIS—carried out completely in software and based on timestamps taken at the interrupt handler level—has been developed, which achieves a synchronization error below $3\,{\upmu }{\rm s}$ . Then, a simple distributed hard real-time control application has been set up, which consists in two PCs running real-time application interface for Linux (RTAI) and connected through Wi-Fi. The actuation error, measured on the generation of synchronous pulses, is strictly below $13\,{\upmu}{\rm s}$ .
65 citations
Cites background from "Delay and Jitter Characterization f..."
...Considering the target accuracy we wish to achieve (in the order of some microseconds), this is often not a serious limitation from a practical point of view, for the reasons explained below....
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...Some basic properties and key features of such protocols are also summarized in Table I....
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TL;DR: A solution to enhance distributed PMU availability, during wired network failures, is presented and it is shown that, if the measurement algorithm is opportunely designed, it is possible to comply, with a single output, with M and P classes of the synchrophasor standard also during network restoration or, at least, to safeguard protection applications if higher latency occurs.
Abstract: Protection and measurement systems in electrical substations are required to have high availability. In an all-digital substation protection system, all the components (instrument transformers, processing units, merging units, intelligent electronic devices, communication network, and synchronization source) may affect the overall availability level. In this paper, a solution to enhance distributed PMU availability, during wired network failures, is presented. In the proposed scheme, the process bus has two parallel networks: 1) the classic wired Ethernet link and 2) a wireless link (implemented with industrial grade IEEE 802.11 devices), for sampled values packets, which carry measurement information. The time synchronization is carried out only through the wired Ethernet link, but the proposed solution is still able to compensate temporary failures of one of the communication links. Experimental tests have been performed to verify the performance of additional IEEE 802.11 link using different protocols and configurations. Communication parameters that can affect the PMU performance, like propagation latency, are characterized. It is shown that, if the measurement algorithm is opportunely designed, depending on the wireless link quality, it is possible to comply, with a single output, with M and P classes of the synchrophasor standard also during network restoration or, at least, to safeguard protection applications if higher latency occurs.
52 citations
Cites background from "Delay and Jitter Characterization f..."
...As demonstrated in [12] and [13], it is possible to achieve a time synchronization on the order of few microseconds (enough for distributed PMU application) also over IEEE 802....
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TL;DR: A dynamic stochastic model inserted into a Kalman filter formulation is applied to track the clock evolution of oscillators and achieve synchrony to a central time reference and shows the synchronization accuracy under stable and varying temperature conditions.
Abstract: A time synchronization technique for networked devices with low-precision oscillators and low computational power is proposed and evaluated. We apply a dynamic stochastic model inserted into a Kalman filter formulation to track the clock evolution of oscillators and achieve synchrony to a central time reference. Indoor and outdoor experiments performed with commercially available wireless sensor platforms over several days serve as a proof of concept and show the synchronization accuracy under stable and varying temperature conditions.
35 citations
Cites background from "Delay and Jitter Characterization f..."
...Further uncertainty in clock behavior is caused by temperature changes, aging, and timestamp fluctuations, to give some examples [8]....
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References
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TL;DR: An analysis of the real-time performance that can be achieved in quality-of-service (QoS)-enabled 802.11 networks has been carried out and a detailed analysis of latencies and packet loss ratios for a typical enhanced distributed channel access (EDCA) infrastructure wireless local area network (WLAN).
Abstract: Nowadays, wireless communication technologies are being employed in an ever increasing number of different application areas, including industrial environments. Benefits deriving from such a choice are manifold and include, among the others, reduced deployment costs, enhanced flexibility and support for mobility. Unfortunately, because of a number of reasons that have been largely debated in the literature, wireless systems cannot be thought of as a means able to fully replace wired networks in production plants, in particular, when real-time behavior is a key issue. In this paper, an analysis of the real-time performance that can be achieved in quality-of-service (QoS)-enabled 802.11 networks has been carried out. In particular, a detailed analysis of latencies and packet loss ratios for a typical enhanced distributed channel access (EDCA) infrastructure wireless local area network (WLAN) is presented, obtained through numerical simulations. A number of aspects that may affect suitability for the use in control systems have been taken into account, including the Transmission Opportunity (TXOP) mechanism, the internal architecture of the AP, the use of a time-division multiple access (TDMA)-based communication scheme as well as the adoption of broadcast communications.
132 citations
"Delay and Jitter Characterization f..." refers background in this paper
...Like all networks that originated from the IT world, WLAN per se has only modest real-time capabilities, which makes its applicability in automation scenarios questionable at first sight [4]....
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09 Apr 1997
TL;DR: Novel ideas incorporated in the APIC design include: protected DMA and protected I/O, which allow applications to queue data for transmission or reception directly from user-space, effectively bypassing the kernel.
Abstract: We are building a high performance 1.2 Gb/s ATM network interface chip called the APIC (ATM Port Interconnect Controller). In addition to borrowing useful ideas from a number of research and commercial prototypes, the APIC design embraces several innovative features, and integrates all of these pieces into a coherent whole. Some of the novel ideas incorporated in the APIC design include: protected DMA and protected I/O, which allow applications to queue data for transmission or reception directly from user-space, effectively bypassing the kernel. This argues for moving the entire protocol stack including the interface device driver into the user-space, thereby yielding better latency and throughput performance than kernel-resident implementations. Pool DMA when used with packet splitting, is a technique that can be used to build true zero-copy kernel-resident protocol stack implementations, using a page-remapping technique. Finally, orchestrated interrupts and interrupt demultiplexing are mechanisms used to reduce the frequency of interrupts issued by the APIC. Although many of these ideas have been developed in the context of an ATM network interface, we believe they are also applicable in other contexts. In particular, protected DMA and I/O are promising techniques for improving the performance of several different types of I/O devices.
111 citations
"Delay and Jitter Characterization f..." refers methods in this paper
...The method to measure (and the resulting ) is discussed below....
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TL;DR: Hardware prototypes of WLAN-enabled IEC 61850 devices are developed using industrial embedded systems, and the performance of smart distribution substation monitoring, control, and protection applications is analyzed for various scenarios using a round trip-time of IEC61850 application messages.
Abstract: Today's power grid is facing many challenges due to increasing load growth, aging of existing power infrastructures, high penetration of renewable, and lack of fast monitoring and control. Utilizing recent developments in Information and Communication Technologies (ICT) at the power-distribution level, various smart-grid applications can be realized to achieve reliable, efficient, and green power. Interoperable exchange of information is already standardized in the globally accepted smart-grid standard, IEC 61850, over the local area networks (LANs). Due to low installation cost, sufficient data rates, and ease of deployment, the industrial wireless LAN technologies are gaining interest among power utilities, especially for less critical smart distribution network applications. Extensive work is carried out to examine the wireless LAN (WLAN) technology within a power distribution substation. The first phase of the work is initiated with the radio noise interference measurements at 27.6- and 13.8-kV distribution substations, including circuit breaker switching operations. For a detailed investigation, the hardware prototypes of WLAN-enabled IEC 61850 devices are developed using industrial embedded systems, and the performance of smart distribution substation monitoring, control, and protection applications is analyzed for various scenarios using a round trip-time of IEC 61850 application messages. Finally, to examine the real-world field performance, the developed prototype devices are installed in the switchyard and control room of 27.6 power distribution substation, and testing results of various applications are discussed.
99 citations
"Delay and Jitter Characterization f..." refers background in this paper
...I. INTRODUCTION T HE INCREASED flexibility and low deployment costsoffered by IEEE 802.11 wireless local area network (WLAN) [1] have extended its usage from normal offices to distributed networks for various applications such as instrumentation and measurement, industrial automation [2], or even…...
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21 Nov 2005
TL;DR: The design and implementation of two IEEE 1588 prototypes for wireless LAN (WLAN) are presented and the results achieved are fully comparable to those achieved with wired LAN implementations.
Abstract: IEEE 1588 is a standard for precise clock synchronization for networked measurement and control systems in LAN environment. This paper presents the design and implementation of two IEEE 1588 prototypes for wireless LAN (WLAN). The first one is implemented using a Linux PC platform and a standard IEEE 802.11 WLAN with modifications to the network device driver. The second prototype is implemented using an embedded WLAN development board that implements the synchronization functionality using an embedded processor with programmable logic device (PLD) circuits. The measured results show that 1.1 ns average clock offset can be reached on HW based implementation, while Linux PC network driver enables 660 ns with a standard WLAN. Although WLAN is an extremely difficult environment for the synchronization, the results achieved with the prototype are fully comparable to those achieved with wired LAN implementations
86 citations
"Delay and Jitter Characterization f..." refers background in this paper
...Owing to the lack of knowledge about the underlying hardware in software timestamp-based synchronization, it is common to treat the system as a black-box, draw timestamps inside the driver or at a higher layer, and focus only on the final synchronization performance as shown in [11] and [12]....
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TL;DR: This paper proposes two new RA techniques for industrial communication systems that are typically subjected to tight reliability and timing requirements and evaluates their behavior by means of numerical simulations carried out for typical industrial traffic profiles, encouraging since the proposed RA techniques show in most cases better performance than ARF.
Abstract: The performance of the IEEE 802.11 WLAN are influenced by the wireless channel characteristics that reflect on the signal-to-noise ratio (SNR), particularly in industrial communication systems, that often operate in harsh environments. In order to cope with SNR reductions, the IEEE 802.11 WLAN specification suggests to adapt (reduce) the transmission rate, since the modulation techniques employed at the lower rates are more robust. However, the standard does not define any rate adaptation (RA) technique, leaving the actual implementation to the device manufacturers choice. In this paper we focus on RA techniques for industrial communication systems that are typically subjected to tight reliability and timing requirements. In detail, we compare the performance figures of a general purpose widespread technique, namely the automatic rate fallback (ARF), with those of the RA techniques actually implemented on two commercially available IEEE 802.11 devices via a set of practical experiments. The obtained results show that these techniques are characterized by a relevant number of packet retransmissions that may introduce a considerable randomness on the service time, possibly leading to performance degradation. Consequently, we propose two new techniques and evaluate their behavior by means of numerical simulations carried out for typical industrial traffic profiles. The outcomes are encouraging since the proposed RA techniques show in most cases better performance than ARF.
62 citations
"Delay and Jitter Characterization f..." refers result in this paper
...This result supports the assertion that time to raise the interrupt at Tx side is independent of the data rate and only depends on the hardware implementation inside the chipset....
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