Proceedings ArticleDOI
Derivation of threshold voltage and drain current for cylindrical MOSFET and application to a recessed MOSFET
Venkatesan Ananthan,Rongsheng Yang,Chandra Mouli +2 more
- pp 9-11
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TLDR
In this article, the threshold voltage and drive current for a cylindrical MOSFET have been rigorously derived for the purpose of analytical calculations, and the model has been verified against TCAD simulations.Abstract:
Threshold voltage and drive current for a cylindrical MOSFET have been rigorously derived for the first time. An approximate expression for these quantities is presented for the purpose of analytical calculations. The model has been verified against TCAD simulations. The characteristics of a recessed gate MOSFET is analysed using these models.read more
Citations
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Journal ArticleDOI
Modeling of Polysilicon Depletion Effect in Recessed-Channel MOSFETs
Yeonsung Kang,Heesang Kim,Jaeho Lee,Younghwan Son,Byung-Gook Park,Jong Duk Lee,Hyungcheol Shin +6 more
TL;DR: In this article, a polysilicon depletion model for recessed-channel (RC) MOSFETs is presented, which shows good agreement with numerical device simulation results.
Journal ArticleDOI
3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model
TL;DR: 3-D-DATE is presented, a circuit-level dynamic random access memory (DRAM) area, timing, and energy model that models both the front and back end of 3-D integrated DRAM designs from 90–16 nm, across a broader range of emerging transistor devices and through-silicon vias.
Modeling and Simulation of InAs Nanowire Transistors
TL;DR: In this article, the electron transport, frequency response and optoelectronic properties of state-of-the-art single InAs nanowire field effect transistors were investigated using both a full-band Monte Carlo simulator and an advanced hydrodynamic simulator.
References
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Proceedings ArticleDOI
S-RCAT (sphere-shaped-recess-channel-array transistor) technology for 70nm DRAM feature size and beyond
Jinmyoung Kim,Hyun-Sil Oh,D.S. Woo,Yeong-Taek Lee,D.H. Kim,S. Kim,G.W. Ha,Hoonki Kim,N.J. Kang,J.M. Park,Young-Nam Hwang,D.I. Kim,Byung-lyul Park,M. Huh,Bang-Lin Lee,S.B. Kim,M.H. Cho,Mi-Yeon Jung,Yongsoo Kim,C. Jin,Dong-won Shin,Myoung-seob Shim,Chang-Sub Lee,W.S. Lee,Joon-Min Park,G.Y. Jin,Yong-young Park,Kinam Kim +27 more
TL;DR: The S-RCAT is proved to be the most promising DRAM array transistor suitable for sub-50nm and mobile applications.
Proceedings ArticleDOI
A novel source-to-drain nonuniformly doped channel (NUDC) MOSFET for high current drivability and threshold voltage controllability
Yoshinori Okumura,M. Shirahata,Tomonori Okudaira,Atsushi Hachisuka,Hideaki Arima,Takayuki Matsukawa,N. Tsubouchi +6 more
TL;DR: In this paper, a novel source-to-drain non-uniformly doped channel (NUDC) MOSFET was investigated theoretically and experimentally using an analytical model.
Journal ArticleDOI
An analysis of the concave MOSFET
K. Natori,I. Sasaki,F. Masuoka +2 more
TL;DR: In this article, the concave MOSFET was analyzed by the two-dimensional numerical method and the theoretical result is in reasonable agreement with the experimental result, and it is observed that the threshold voltage depends strongly on the substrate bias voltage as compared with the long-channel normal MOS FET.
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