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Proceedings ArticleDOI

Deriving the behavioral properties from UML designs as LTL for model checking

TL;DR: An approach called verification property generator is proposed in this paper that defines safety and liveness properties independently that reduces the verification overhead and hence the properties can be evaluated under any model checking environment.
Abstract: Design models help the system development to analyze and visualize its working scenario as a blueprint or a prototype. A successful or error free design leads to an efficient implementation. Thus ensuring the design correctness is a crucial factor in a complex system development like communication protocols. They are reactive in nature and the general verification like correctness evaluation will not yield an effective design because they change their behaviors from time-to-time. One of the way to overcome this problem is to verify their functional behaviors based on the time interval i.e., temporal ordering. To achieve this, an approach called verification property generator is proposed in this paper. The possible functional behaviors are captured in linear temporal logic for the given unified modeling language diagram based on the assumption rules. Here, the safety and liveness properties are defined independently that reduces the verification overhead. The approach is presented in general and hence the properties can be evaluated under any model checking environment.
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Proceedings ArticleDOI
23 Apr 2015
TL;DR: A verification approach to verify the authors' component-based protocol designs by combing trace equivalence and model checking, and presents a method for automatically transforming the protocol design components into PROMELA.
Abstract: Ensuring design correctness is an important task in the software development and in particular component-based protocol development. We developed a component-oriented design approach for the design of communication protocols and distributed systems. The approach aims at the reuse of components represented by Unified Modeling Language (UML) diagrams. In this paper we propose a verification approach to verify our component-based protocol designs by combing trace equivalence and model checking. Foremost, the internal and external component behaviors are verified independently regarding their formal correctness. Next, the correctness and consistency of compositions are verified. This is achieved by generating the component adaptation path as traces during the composition. The requirements, i.e., safety and liveness properties, are formulated using linear temporal logic formulae. We apply the Spin tool as our model checking mechanism. For this, we present a method for automatically transforming the protocol design components into PROMELA.

1 citations


Cites methods from "Deriving the behavioral properties ..."

  • ...A method to specify properties from the design specification is given in [23]....

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Journal ArticleDOI
TL;DR: This paper focuses on presenting various studies on formal verification approaches and how the V&V can be achieved for developing high dependable digital embedded systems.
Abstract: : The complexity of digital embedded systems has been increasing in different safety-critical applications such as industrial automation, process control, transportation, and medical digital devices. The correct operation of these systems relies too heavily on the behavior of the embedded digital device. As a result, any mistake or error made during the design stage of the embedded device can change the overall functionality of the critical system and cause catastrophic consequences. To detect these errors and eliminate their effects on the system, new error detection approaches must be innovated and used in the design of the digital system. However, these methods require enormous costs and time. One of these methods being employed to solve this issue is called Verification and Validation (V&V) which confirms that the system behavior meets the requirements early in the development process, before moving on to the implementation phase. Because of their benefits and importance in the building of complex digital systems, the employment of formal V&V methods has recently attracted a lot of attention. This paper focuses on presenting various studies on formal verification approaches and how the V&V can be achieved for developing high dependable digital embedded systems.
References
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01 Sep 1996
TL;DR: Model checking tools, created by both academic and industrial teams, have resulted in an entirely novel approach to verification and test case generation that often enables engineers in the electronics industry to design complex systems with considerable assurance regarding the correctness of their initial designs.
Abstract: Turing Lecture from the winners of the 2007 ACM A.M. Turing Award. In 1981, Edmund M. Clarke and E. Allen Emerson, working in the USA, and Joseph Sifakis working independently in France, authored seminal papers that founded what has become the highly successful field of model checking. This verification technology provides an algorithmic means of determining whether an abstract model---representing, for example, a hardware or software design---satisfies a formal specification expressed as a temporal logic (TL) formula. Moreover, if the property does not hold, the method identifies a counterexample execution that shows the source of the problem. The progression of model checking to the point where it can be successfully used for complex systems has required the development of sophisticated means of coping with what is known as the state explosion problem. Great strides have been made on this problem over the past 28 years by what is now a very large international research community. As a result many major hardware and software companies are beginning to use model checking in practice. Examples of its use include the verification of VLSI circuits, communication protocols, software device drivers, real-time embedded systems, and security algorithms. The work of Clarke, Emerson, and Sifakis continues to be central to the success of this research area. Their work over the years has led to the creation of new logics for specification, new verification algorithms, and surprising theoretical results. Model checking tools, created by both academic and industrial teams, have resulted in an entirely novel approach to verification and test case generation. This approach, for example, often enables engineers in the electronics industry to design complex systems with considerable assurance regarding the correctness of their initial designs. Model checking promises to have an even greater impact on the hardware and software industries in the future. ---Moshe Y. Vardi, Editor-in-Chief

7,392 citations

Book
25 Apr 2008
TL;DR: Principles of Model Checking offers a comprehensive introduction to model checking that is not only a text suitable for classroom use but also a valuable reference for researchers and practitioners in the field.
Abstract: Our growing dependence on increasingly complex computer and software systems necessitates the development of formalisms, techniques, and tools for assessing functional properties of these systems. One such technique that has emerged in the last twenty years is model checking, which systematically (and automatically) checks whether a model of a given system satisfies a desired property such as deadlock freedom, invariants, and request-response properties. This automated technique for verification and debugging has developed into a mature and widely used approach with many applications. Principles of Model Checking offers a comprehensive introduction to model checking that is not only a text suitable for classroom use but also a valuable reference for researchers and practitioners in the field. The book begins with the basic principles for modeling concurrent and communicating systems, introduces different classes of properties (including safety and liveness), presents the notion of fairness, and provides automata-based algorithms for these properties. It introduces the temporal logics LTL and CTL, compares them, and covers algorithms for verifying these logics, discussing real-time systems as well as systems subject to random phenomena. Separate chapters treat such efficiency-improving techniques as abstraction and symbolic manipulation. The book includes an extensive set of examples (most of which run through several chapters) and a complete set of basic results accompanied by detailed proofs. Each chapter concludes with a summary, bibliographic notes, and an extensive list of exercises of both practical and theoretical nature.

4,905 citations


"Deriving the behavioral properties ..." refers background or methods in this paper

  • ...A theoretical proof is illustrated in [7] and it is complicated while realizing on a programming level....

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  • ...[7], for a given LTL formula the decomposition theorem can be used to extract and fragment the properties....

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  • ...Formally illustrating, to obtain a liveness property of system P, the theorem from [7] can be used i....

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  • ...A proof for the safety property is illustrated in [7] and an example for the same is given in the following for a clear understanding....

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  • ...[7] is considered as a safety property....

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Book
07 Jan 1999

4,478 citations

Book
01 May 2011
TL;DR: The SPIN Model Checker as mentioned in this paper is used for both teaching software verification techniques, and for validating large scale applications, and it has been estimated that up to three-quarters of the $400 billion spent annually to hire programmers in the United States is ultimately spent on debugging.
Abstract: The SPIN Model Checker is used for both teaching software verification techniques, and for validating large scale applications. The growing number of users has created a need for a more comprehensive user guide and a standard reference manual that describes the most recent version of the tool. This book fills that need. SPIN is used in over 40 countries. The offical SPIN web site, spinroot.com receives between 2500 and 3000 hits per day. It has been estimated that up to three-quarters of the $400 billion spent annually to hire programmers in the United States is ultimately spent on debugging

2,530 citations

01 Jan 2000

1,761 citations