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Proceedings ArticleDOI

Design and analysis of low noise amplifier using active feedback for boundary layer radar

TL;DR: In this article, an active feedback with neutralization capacitance is adopted for the design of low noise amplifier (LNA) at 915MHz for boundary layer radar application is presented.
Abstract: The design of low noise amplifier (LNA) at 915MHz for boundary layer radar application is presented in this paper. An active feedback with neutralization capacitance is adopted for the design to boost the gain of the LNA. The excellent optimum tradeoff between noise figure (NF) and gain is achieved by using source degenerated inductor and input and output T-network LC tuning circuit. Source degenerated inductor is useful in achieving stability over a wide range of frequencies. To obtain optimum performance of LNA, low loss and low cost dielectric substrate RT/duroid RO4003C is used. The simulated results of LNA show that the circuit is having a noise figure of 0.233 dB which is very close to the minimum noise figure of the circuit with a gain of 21 dB. The isolation loss is less than −27 dB and the input and output return losses are less than −10 dB. LNA consumes a total power of 180 mW from 3 volts supply.
Citations
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Proceedings ArticleDOI
10 Jun 2020
TL;DR: In this paper, a Ku-band LNA at 13– 16 GHz is designed with low NF, high gain, and low power consumption for space application and implemented with three-stage cascade source degeneration technique.
Abstract: In this paper, a Ku-band LNA at 13– 16 GHz is designed with low NF, high gain, and low power consumption for space application This paper presents high gain, too low noise figure, and low power consumption low noise amplifier (LNA). Simultaneously achieving high gain and low noise figure (NF), a popular source degeneration technique is used. Also for achieving high gain, this work is implemented with three-stage cascade source degeneration technique. The proposed work also aims to optimize the input, output and isolation losses. For achieving a low noise figure, InGaAs HEMT technology is used and Ku Band at 13–16 GHz LNA is designed for space application. Simulated results are NF of 1.008 and 0.719 dB and gain of 29.70 and 22.83 dB. The less than −12 dB is achieved for return losses of input and output. The Stability Factor and Mu1 are greater than 3 at desired 13–16 GHz. The amplifier biasing V ds , I ds is 2V and 10 mA respectively are chosen. The Keysight Technology Advanced Design System is used for simulating all parameters. The LNA consumes the power of 250 mW from the simulated values.

5 citations


Cites methods from "Design and analysis of low noise am..."

  • ...The R1 and R2 are used at T1 transistor gate and drain as biasing resistors, biasing resistors R3 and R4 are used for T2 transistor, and similarly biasing resistors R5 and R6 are used for T3 transistor [8-11]....

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Proceedings ArticleDOI
10 Jun 2020
TL;DR: To achieve high gain and low noise figure (NF), resistive feedback in conjunction with source degeneration is used and InGaAs HEMT technology is used, and Ku Band at 14 GHz LNA is designed for space application.
Abstract: This paper presents high gain and too low noise figure low noise amplifier (LNA). To achieve high gain and low noise figure (NF), resistive feedback in conjunction with source degeneration is used. Also, for achieving high gain, this work is implemented with cascading two stages and for achieving low noise figure, InGaAs HEMT technology is used and Ku Band at 14 GHz LNA is designed for space application. Simulated results are NF of 0.76 dB, and gain of 30.67 dB. The less than −14 dB is achieved for return losses of input and output. The Stability Factor and Mu1 is greater than 4 at desired 14 GHz. The amplifier biasing V ds , I ds is 2V and 10 mA respectively are chosen. The Keysight Technology Advanced Design System is used for simulating all parameters. The LNA consumes low power of 300 mW from the simulated values.

Cites methods from "Design and analysis of low noise am..."

  • ...The R1, R2, R3, and R4 are used at T1 and T2 transistors gate and drain as biasing resistors, biasing resistors R5, R6, R7, and R8 are used at T3 and T4 transistors [8-11]....

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References
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Proceedings ArticleDOI
13 Jun 1996
TL;DR: In this paper, a 1.5 GHz low noise amplifier for a Global Positioning System (GPS) receiver has been implemented in a 0.6 /spl mu/m CMOS process.
Abstract: A 1.5 GHz low noise amplifier for a Global Positioning System (GPS) receiver has been implemented in a 0.6 /spl mu/m CMOS process. This amplifier provides a forward gain of 22 dB with a noise figure of only 3.5 dB while drawing 30 mW from a 1.5 V supply. To the authors' knowledge, this represents the lowest noise figure reported to date for a CMOS amplifier operating above 1 GHz.

558 citations


"Design and analysis of low noise am..." refers background in this paper

  • ...The above equation will have real impedance if we select the value of L + L s g is equal to Cgs at resonance [16]....

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Journal ArticleDOI
TL;DR: It is demonstrated that competitive RF performance is achievable thanks to CMOS downscaling, pleasing many applications because of their low cost (digital CMOS) and low area (bondpad size).
Abstract: The emerging concept of multistandard radios calls for low-noise amplifier (LNA) solutions able to comply with their needs. Meanwhile, the increasing cost of scaled CMOS pushes towards low-area solutions in standard, digital CMOS. Feedback LNAs are able to meet both demands. This paper is devoted to the design of low-area active-feedback LNAs. We discuss the design of wideband, narrowband and multiband implementations. We demonstrate that competitive RF performance is achievable thanks to CMOS downscaling, pleasing many applications because of their low cost (digital CMOS) and low area (bondpad size).

184 citations


"Design and analysis of low noise am..." refers background in this paper

  • ...Other author proposed the design of low area active feedback low noise amplifier [6], this design achieves low area occupation and excellent low power consumption....

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Journal ArticleDOI
TL;DR: The current injection testing technique enables accurate gain measurements in order to detect faulty impedance matching networks and can be used without design changes to measure the voltage gain during on-wafer test and to measure S21 during final test in the presence of gate inductance and package parasitics.
Abstract: In this paper, a practical current injection based built-in test (BIT) technique for impedance-matched RF low-noise amplifiers (LNAs) is proposed. A current generation circuit injects the RF test current at the gate of the LNA; this approach has the advantage that the matching network is not affected by the test circuitry. The technique can be used without design changes to measure the voltage gain during on-wafer test and to measure S21 during final test in the presence of gate inductance and package parasitics. Furthermore, the current injection testing technique enables accurate gain measurements in order to detect faulty impedance matching networks. The proposed current-based BIT requires an on-chip voltage source, two on-chip power detectors (PDs), and an accurate external resistor. On-chip or external equipment resources are only required to measure the dc output of the PDs. As a proof of concept, a 2.1-GHz inductor-degenerated common-source LNA with a gain of 23.9 dB was designed in 0.13-mum CMOS technology together with the BIT circuitry (14% area overhead). The gain predicted by the current injection RF BIT agrees with the simulated gain using corner models within 0.8-dB error.

43 citations


"Design and analysis of low noise am..." refers background in this paper

  • ...The overall voltage gain, G of the common source LNA can be expressed as [17] ( ) g Z m1 0 sC V gs out G = = L 1 V s in R + g + s L + L + s s g m1 C sC gs gs (14)...

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Journal ArticleDOI
TL;DR: In this paper, a single-ended complementary current-reuse low-noise amplifier (CCRLNA) is proposed that achieves a power gain of 20 dB, noise figure (NF) of 2.8 dB, IIP3 of -8.1 dBm, and second-order intercept point of +34 dBm while consuming only 150 μW at 1-V supply voltage.
Abstract: An ultra-low-power 401-406-MHz Medical Device Radiocommunications Service receiver RF front-end for biomedical telemetry applications is implemented using 0.18-μm CMOS technology. A single-ended complementary current-reuse low-noise amplifier (CCRLNA) is proposed that achieves a power gain of 20 dB, noise figure (NF) of 2.8 dB, IIP3 of -8.1 dBm, and second-order intercept point of +34 dBm while consuming only 150 μW at 1-V supply voltage. The total receiver RF front-end, including the proposed CCRLNA, in-phase/quadrature folded mixers, and local oscillator buffers, achieves a conversion gain of 28.7 dB, NF of 5.5 dB, and third-order intercept point of -25 dBm while consuming less than 500 μW from a 1-V supply voltage and occupying 0.7 mm2 of core die area.

41 citations


"Design and analysis of low noise am..." refers background in this paper

  • ...The input impedance of the source degerated inductance low noise amplifier is well known [15]...

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Journal ArticleDOI
TL;DR: In this article, a novel circuit topology for a CMOS low-noise amplifier (LNA) is presented, which employs a positive feedback technique at the common-source transistor of the cascade stage.
Abstract: A novel circuit topology for a CMOS low-noise amplifier (LNA) is presented in this paper. By employing a positive feedback technique at the common-source transistor of the cascade stage, the voltage gain can be enhanced. In addition, with the MOS transistors biased in the moderate inversion region, the proposed LNA circuit is well suited to operate at reduced power consumption and supply voltage conditions. Utilizing a standard ${\hbox {0.18-}}\mu{\hbox {m}}$ CMOS process, the CMOS LNA has been demonstrated for 5-GHz frequency band applications. Operated at a supply voltage of 0.6 V, the LNA with the gain-boosting technique achieves a gain of 13.92 dB and a noise figure of 3.32 dB while consuming a dc power of ${\hbox {834 }} \mu{\hbox{W}}$ . The measured ${ P}_{{\rm 1}{\hbox{-}}{\rm {dB}}}$ and input third-order intercept point are $-{{\hbox {22.2}}}$ and $-{{\hbox {11.5 dBm}}}$ , respectively

37 citations


"Design and analysis of low noise am..." refers background in this paper

  • ...Superior ultra low power LNA is reported [8], which is having excellent low power consumption and good input and output return losses....

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