scispace - formally typeset
Journal ArticleDOI

Design and fabrication of surface trimmed silicon-on-insulator waveguide with adiabatic spot-size converters

20 Feb 2017-Applied Optics (Optical Society of America)-Vol. 56, Iss: 6, pp 1708-1716

TL;DR: The proposed surface trimming technique can be potentially used to tune the waveguide cross-section/geometry for phase error correction and/or to avail stronger light-matter interactions at a desired location of an integrated optical circuit.

AbstractTheoretical and experimental studies reveal that a predefined single-mode rib waveguide fabricated in silicon-on-insulator (SOI) substrate with a device layer thickness of 2 μm can be adiabatically trimmed down to submicron waveguide dimensions (<1  μm), resulting in regional modification of waveguide properties. The fabrication process involves physical trimming/removal of a waveguide surface by plasma etchants that is spatially filtered by a shadow mask with a rectangular aperture inside a reactive ion etching system. The exact position of a shadow mask above a sample surface has been optimized (∼500  μm) to obtain the desired adiabatic spot-size converters of length up to 1 mm at both ends of the trimmed waveguides. For experimental demonstration, three different sets of 15-mm-long single-mode waveguides fabricated in 2-μm SOI were adiabatically trimmed in the middle for three different lengths of 3, 5, and 7 mm, respectively. Excess propagation loss and group index of a trimmed submicron waveguide section were extracted by analyzing the wavelength-dependent Fabry–Perot transmission characteristics of the device with polished input/output end facets. The insertion loss of a typical spot-size converter designed for the guidance of TE-like polarization has been recorded to be ∼0.25  dB for a wide range of wavelengths (1500  nm≤λ≤1600  nm). As predicted by numerical simulation, no polarization rotation has been observed in all the trimmed submicron waveguides. The proposed surface trimming technique can be potentially used to tune the waveguide cross-section/geometry for phase error correction and/or to avail stronger light-matter interactions at a desired location of an integrated optical circuit.

...read more


Citations
More filters
Dissertation
01 Jan 2018
TL;DR: In this article, an ultra-subwavelength grating coupler has been developed with an engineered grating structure which exhibits high coupling efficiency and bandwidth without the need for bottom mirrors.
Abstract: In recent years silicon photonics has become a considerable mainstream technology, especially in telecommunications fields to overcome the limitations imposed by copper-based technology. Nanoscale photonic technologies have attracted a lot of attention to co-develop photonic and electronic devices on silicon (Si) to provide a highly integrated electronic–photonic platform. Silicon-on-insulator (SOI) technology that relies heavily on the contrasted indices of Si and SiO2, enables the design and integration of these photonic devices in submicronic scales, similar to the devices produced by a standard CMOS fabrication platform in the electronics industry. One of the key challenges with these submicronic waveguide devices is to enable efficient coupling with fibre, which is mainly due to the mode-field differences between fibre and the waveguide, and their relative misalignments. To overcome this challenge, various techniques including prism, butt and grating coupling have been proposed. Among them, although butt coupling is an elegant solution for low loss and wideband operation, it often requires post-processing for accurate polishing and dicing to taper the waveguide edges. Therefore, it is not suitable for wafer-scale testing. Grating couplers, which mostly perform out of the plane coupling between a fibre and a waveguide, are also an attractive solution as light can be coupled in and out everywhere on the chip, opening the way for wafer-scale testing. However, despite such advantages, grating couplers often exhibit low coupling efficiency (CE) due to downward radiation of light that propagates towards substrate through buried oxide (BOX) which comprises 35%-45% of total incident light. Grating couplers are also very sensitive to the wavelength of the light as different wavelengths exhibit specific diffraction properties at the grating, which cause a narrow coupling bandwidth. In this thesis we have studied various techniques to improve the coupling efficiency and coupling bandwidth of the grating couplers. We have used the finite difference time domain (FDTD) and Eigenmode Expansion (EME) methods to study the interaction of light with grating. The directionality of the coupler which determines the coupling efficiency has been improved by means of silicon mirrors in the BOX layer that essentially redirect the light propagates toward substrate. For improvement of directionality, an ultra-subwavelength grating coupler has also been developed with an engineered grating structure which exhibits high coupling efficiency and bandwidth without the need for bottom mirrors. The grating coupler only converts vertical dimension into nano scale, leaving the lateral width in micrometre range typically >15 μm. In order to connect the grating coupler with a nanophotonic waveguide, the grating structure needs to be matched in dimensions both vertically and laterally. Conventionally, to meet the requirement the width of grating structure is gradually tapered to nano scale. The coupling efficiency relies highly on the taper length, which is typically hundreds of micrometres. Such a long taper waveguide causes an unnecessarily large footprint of the photonic integrated circuits. In order to minimise the length of the taper while retaining high coupling efficiency, we have designed two different types of tapered waveguides. One of them is a partially overlaid tapered waveguide and the other is a hollow tapered waveguide.

4 citations


Cites methods from "Design and fabrication of surface t..."

  • ...The design and fabrication procedures are described in [111] for surface-trimmed silicon-on-insulator waveguide with adiabatic SSCs where the insertion loss of ∼0....

    [...]

Proceedings ArticleDOI
30 May 2017
TL;DR: In this paper, diffusion doped p-i-n/p-n diodes in SOI substrate are proposed for the fabrication of active silicon photonics devices with scalable waveguide cross-sections.
Abstract: Diffusion doped p-i-n/p-n diodes in SOI substrate is proposed for the fabrication of active silicon photonics devices with scalable waveguide cross-sections. The p-type and n-type diffusion doping parameters are optimized for the fabrication of tunable single-mode waveguide phase-shifters with microns to submicron cross-sectional dimensions. The simulations results show that the shape of depletion layer can be effectively engineered by suitably positioning the rib waveguide with respect to the gap between doping windows. We could thus introduce an additional control parameter to optimize over-all figure of merits of the phase-shifter for various applications. For an optimized set of diffusion parameters, the VπLπ of single-mode waveguides designed with 1μm, 0.5μm, and 0.25μm device layers (under reverse bias operating in TE-polarization at λ ~ 1550 nm) are found as 2.7 V-cm, 2.1 V-cm, and 1.6 V-cm, respectively. The typical p-n junction capacitance of an optimized 0.25μm single-mode waveguide is estimated to be < 0.5 fF/μm, which is comparable to that of ion-implanted p-n waveguide junctions.

2 citations


References
More filters
Journal ArticleDOI
TL;DR: In this paper, the state-of-the-art CMOS silicon-on-insulator (SOI) foundries are now being utilized in a crucial test of 1.55mum monolithic optoelectronic (OE) integration, a test sponsored by the Defense Advanced Research Projects Agency (DARPA).
Abstract: The pace of the development of silicon photonics has quickened since 2004 due to investment by industry and government. Commercial state-of-the-art CMOS silicon-on-insulator (SOI) foundries are now being utilized in a crucial test of 1.55-mum monolithic optoelectronic (OE) integration, a test sponsored by the Defense Advanced Research Projects Agency (DARPA). The preliminary results indicate that the silicon photonics are truly CMOS compatible. RD however, lasing has not yet been attained. The new paradigm for the Si-based photonic and optoelectric integrated circuits is that these chip-scale networks, when suitably designed, will operate at a wavelength anywhere within the broad spectral range of 1.2-100 mum, with cryocooling needed in some cases

1,605 citations

Journal ArticleDOI
17 Feb 2005-Nature
TL;DR: The demonstration of a continuous-wave silicon Raman laser is demonstrated and it is shown that TPA-induced FCA in silicon can be significantly reduced by introducing a reverse-biased p-i-n diode embedded in a silicon waveguide.
Abstract: Achieving optical gain and/or lasing in silicon has been one of the most challenging goals in silicon-based photonics because bulk silicon is an indirect bandgap semiconductor and therefore has a very low light emission efficiency. Recently, stimulated Raman scattering has been used to demonstrate light amplification and lasing in silicon. However, because of the nonlinear optical loss associated with two-photon absorption (TPA)-induced free carrier absorption (FCA), until now lasing has been limited to pulsed operation. Here we demonstrate a continuous-wave silicon Raman laser. Specifically, we show that TPA-induced FCA in silicon can be significantly reduced by introducing a reverse-biased p-i-n diode embedded in a silicon waveguide. The laser cavity is formed by coating the facets of the silicon waveguide with multilayer dielectric films. We have demonstrated stable single mode laser output with side-mode suppression of over 55 dB and linewidth of less than 80 MHz. The lasing threshold depends on the p-i-n reverse bias voltage and the laser wavelength can be tuned by adjusting the wavelength of the pump laser. The demonstration of a continuous-wave silicon laser represents a significant milestone for silicon-based optoelectronic devices.

1,228 citations

Journal ArticleDOI
TL;DR: In this paper, the authors demonstrate the first monolithically integrated CMOS-compatible source by creating an optical parametric oscillator formed by a silicon nitride ring resonator on silicon.
Abstract: Silicon photonics enables the fabrication of on-chip, ultrahigh-bandwidth optical networks that are critical for the future of microelectronics1,2,3 Several optical components necessary for implementing a wavelength division multiplexing network have been demonstrated in silicon However, a fully integrated multiple-wavelength source capable of driving such a network has not yet been realized Optical amplification, a necessary component for lasing, has been achieved on-chip through stimulated Raman scattering4,5, parametric mixing6 and by silicon nanocrystals7 or nanopatterned silicon8 Losses in most of these structures have prevented oscillation Raman oscillators have been demonstrated9,10,11, but with a narrow gain bandwidth that is insufficient for wavelength division multiplexing Here, we demonstrate the first monolithically integrated CMOS-compatible source by creating an optical parametric oscillator formed by a silicon nitride ring resonator on silicon The device can generate more than 100 new wavelengths with operating powers below 50 mW This source can form the backbone of a high-bandwidth optical network on a microelectronic chip A monolithically integrated CMOS-compatible source is demonstrated using an optical parametric oscillator based on a silicon nitride ring resonator on silicon Generating more than 100 wavelengths simultaneously and operating at powers below 50 mW, scientists say that it may form the basis of an on-chip high-bandwidth optical network

962 citations

Journal ArticleDOI
TL;DR: It is shown that the micrometer-long silicon-on-insulator-based nanotaper coupler is able to efficiently convert both the mode field profile and the effective index, with a total length as short as 40 microm, during compact mode conversion between a fiber and a submicrometer waveguide.
Abstract: We propose and demonstrate an efficient coupler for compact mode conversion between a fiber and a submicrometer waveguide. The coupler is composed of high-index-contrast materials and is based on a short taper with a nanometer-sized tip. We show that the micrometer-long silicon-on-insulator-based nanotaper coupler is able to efficiently convert both the mode field profile and the effective index, with a total length as short as 40 microm. We measure an enhancement of the coupling efficiency between an optical fiber and a waveguide by 1 order of magnitude due to the coupler.

959 citations

Journal ArticleDOI
Yurii A. Vlasov1, Sharee J. McNab1
TL;DR: The fabrication and accurate measurement of propagation and bending losses in single-mode silicon waveguides with submicron dimensions fabricated on silicon-on-insulator wafers with record low numbers can be used as a benchmark for further development of silicon microphotonic components and circuits.
Abstract: We report the fabrication and accurate measurement of propagation and bending losses in single-mode silicon waveguides with submicron dimensions fabricated on silicon-on-insulator wafers. Owing to the small sidewall surface roughness achieved by processing on a standard 200mm CMOS fabrication line, minimal propagation losses of 3.6+/-0.1dB/cm for the TE polarization were measured at the telecommunications wavelength of 1.5microm. Losses per 90 masculine bend are measured to be 0.086+/-0.005dB for a bending radius of 1microm and as low as 0.013+/-0.005dB for a bend radius of 2microm. These record low numbers can be used as a benchmark for further development of silicon microphotonic components and circuits.

955 citations