Design and testing of monolithic active pixel sensors for charged particle tracking
15 Oct 2000-Vol. 49, Iss: 2, pp 601-610
TL;DR: In this paper, a monolithic active pixel sensor (MAPS) for charged particle tracking based on a novel detector structure was proposed, simulated, fabricated and tested, which is inseparable from the readout electronics, since both of them are integrated onto the same, standard for a CMOS process.
Abstract: A monolithic active pixel sensor (MAPS) for charged particle tracking based on a novel detector structure was proposed, simulated, fabricated and tested. The detector designed accordingly to this idea is inseparable from the readout electronics, since both of them are integrated onto the same, standard for a CMOS process, low-resistivity silicon wafer. The individual pixel is comprised of only 3 MOS transistors and a photodiode collecting the charge created in a thin undepleted epitaxial layer. This approach provides the whole detector surface sensitive to radiation (100% fill factor) with reduced pixel pitch(very high spatial resolution). This yields a low cost, high resolution and thin detecting device. The detailed device simulations using an ISE-TCAD package have been carried out in order to study a charge collection mechanism and to validate the proposed idea. Consequently, two prototype chips have been fabricated using 0.6 /spl mu/m and 0.35 /spl mu/m CMOS processes. Special radiation tolerant layout techniques were used in the second chip design. Both chips were tested and fully characterised. The pixel conversion gain was calibrated using 5.9 keV photons and prototype devices were exposed to the 120 GeV/c pion beams at CERN. Obtained results preceded by general design ideas and simulation results are reviewed.
Citations
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21 Sep 2003-Nuclear Instruments & Methods in Physics Research Section A-accelerators Spectrometers Detectors and Associated Equipment
TL;DR: In this article, the authors present results from tests performed with relativistic charged particles on prototypes essentially fabricated with a classical 3-transistor pixel configuration and two novel ideas optimising the pixel design for a vertex detector have been developed.
Abstract: Monolithic active pixel sensors introduce a detection technique, where the active detecting element is a thin, moderately doped, and undepleted silicon layer and the readout electronics is implanted on top of it. The built-in potential, resulting from differences in doping, screens both parts, as well as it confines the charge diffusing to the readout electrodes. The R&D was triggered by the increasing need of high performance flavour identification capabilities that should be provided by future vertex detectors. The viability of the technology and its high tracking performances were demonstrated with small-scale prototypes, made of small arrays of a few thousands of pixels and more recently with a first prototype of a serviceable size of one million pixels. This paper summarizes results from tests performed with relativistic charged particles on prototypes essentially fabricated with a classical 3-transistor pixel configuration. Within the last year, two novel ideas optimising the pixel design for a vertex detector have been developed. They are presented with test results assessing their suitability.
68 citations
TL;DR: Characterization of monolithic active pixel sensors (MAPS) in a scanning electron microscope (SEM) as well as in a transmission electron microscopy (TEM) using the MIMOSA V (MV) chip is discussed.
66 citations
Posted Content•
TL;DR: A high-level model of CCD and CMOS photosensors based on a literature review is formulated and can be used to create synthetic images for testing and validation of image processing algorithms in the presence of realistic images noise.
Abstract: In many applications, such as development and testing of image processing algorithms, it is often necessary to simulate images containing realistic noise from solid-state photosensors. A high-level model of CCD and CMOS photosensors based on a literature review is formulated in this paper. The model includes photo-response non-uniformity, photon shot noise, dark current Fixed Pattern Noise, dark current shot noise, offset Fixed Pattern Noise, source follower noise, sense node reset noise, and quantisation noise. The model also includes voltage-to-voltage, voltage-to-electrons, and analogue-to-digital converter non-linearities. The formulated model can be used to create synthetic images for testing and validation of image processing algorithms in the presence of realistic images noise. An example of the simulated CMOS photosensor and a comparison with a custom-made CMOS hardware sensor is presented. Procedures for characterisation from both light and dark noises are described. Experimental results that confirm the validity of the numerical model are provided. The paper addresses the issue of the lack of comprehensive high-level photosensor models that enable engineers to simulate realistic effects of noise on the images obtained from solid-state photosensors.
60 citations
TL;DR: In this article, a standard CMOS 0.25 mum digital process is used to design a test chip which includes different pixel types, column-level discriminators, and a fully programmable digital sequencer.
Abstract: In order to develop precision vertex detectors for the future linear collider, fast monolithic active pixel sensors are studied. A standard CMOS 0.25 mum digital process is used to design a test chip which includes different pixel types, column-level discriminators, and a fully programmable digital sequencer. In-pixel amplification is implemented together with double sampling. Different charge-to-voltage conversion factors were obtained using amplifiers with different gains or diode sizes. Pixel architectures with dc and ac coupling to charge sensing element were proposed. Hits from conversion of 55Fe photons were recorded for the dc-coupled and ac-coupled pixel versions. Double sampling is functional and allows almost a complete cancellation of fixed pattern noise
58 citations
30 Nov 2006-Nuclear Instruments & Methods in Physics Research Section A-accelerators Spectrometers Detectors and Associated Equipment
TL;DR: In this article, the feasibility of a new implementation of CMOS monolithic active pixel sensors (MAPS) for applications to charged particle tracking is studied. But the authors focus on the front-end of the front end of the system, which relies upon a charge sensitive amplifier (CSA), embedded in the elementary pixel cell.
Abstract: This work studies the feasibility of a new implementation of CMOS monolithic active pixel sensors (MAPS) for applications to charged particle tracking. As compared to standard three MOSFET MAPS, where the charge signal is readout by a source follower, the proposed front-end scheme relies upon a charge sensitive amplifier (CSA), embedded in the elementary pixel cell, to perform charge-to-voltage conversion. The area required for the integration of the front-end electronics is mostly provided by the collecting electrode, which consists of a deep n-type diffusion, available as a shielding frame for n-channel devices in deep submicron, triple well CMOS technologies. Based on the above concept, a chip, which includes several test structures differing in the sensitive element area, has been fabricated in a 0.13 μ m CMOS process. In this paper, the criteria underlying the design of the pixel level analog processor will be presented, together with some preliminary experimental results demonstrating the feasibility of the proposed approach.
55 citations
References
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TL;DR: In this article, the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
Abstract: CMOS active pixel sensors (APS) have performance competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost, and miniaturization. This paper discusses the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
1,182 citations
Journal Article•
TL;DR: In this article, the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
Abstract: CMOS active pixel sensors (APS) have performance competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost, and miniaturization. This paper discusses the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
693 citations
11 Feb 2001-Nuclear Instruments & Methods in Physics Research Section A-accelerators Spectrometers Detectors and Associated Equipment
TL;DR: In this article, a novel active pixel sensor (MAPS) for charged particle tracking made in a standard CMOS technology is proposed, which has a special structure, which allows the high detection efficiency required for tracking applications.
Abstract: A novel Monolithic Active Pixel Sensor (MAPS) for charged particle tracking made in a standard CMOS technology is proposed. The sensor is a photodiode, which is readily available in a CMOS technology. The diode has a special structure, which allows the high detection efficiency required for tracking applications. The partially depleted thin epitaxial silicon layer is used as a sensitive detector volume. Semiconductor device simulation, using either ToSCA based or 3-D ISE-TCAD software packages shows that the charge collection is efficient, reasonably fast (order of 100 ns), and the charge spreading limited to a few pixels only. A first prototype has been designed, fabricated and tested. It is made of four arrays each containing 64×64 pixels, with a readout pitch of 20 μm in both directions. The device is fabricated using standard submicron 0.6 μm CMOS process, which features twin-tub implanted in a p-type epitaxial layer, a characteristic common to many modern CMOS VLSI processes. Extensive tests made with soft X-ray source ( 55 Fe) and minimum ionising particles (15 GeV/ c pions) fully demonstrate the predicted performances, with the individual pixel noise (ENC) below 20 electrons and the Signal-to-Noise ratio for both 5.9 keV X-rays and Minimum Ionising Particles (MIP) of the order of 30. This novel device opens new perspectives in high-precision vertex detectors in Particle Physics experiments, as well as in other application, like low-energy beta particle imaging, visible light single photon imaging (using the Hybrid Photon Detector approach) and high-precision slow neutron imaging.
395 citations
CERN1
TL;DR: In this paper, the authors discuss design issues related to the extensive use of Enclosed Layout Transistors (ELT's) and guard rings in deep submicron CMOS technologies in order to improve radiation tolerance of ASIC's designed for the LHC experiments.
Abstract: We discuss design issues related to the extensive use of Enclosed Layout Transistors (ELT's) and guard rings in deep submicron CMOS technologies in order to improve radiation tolerance of ASIC's designed for the LHC experiments (the Large Hadron Collider at present under construction at CERN). We present novel aspects related to the use of ELT's: noise measured before and after irradiation up to 100 Mrad (SiO/sub 2/), a model to calculate the W/L ratio and matching properties of these devices. Some conclusions concerning the density and the speed of IC's conceived with this design approach are finally drawn.
352 citations
01 Jun 2001-Nuclear Instruments & Methods in Physics Research Section A-accelerators Spectrometers Detectors and Associated Equipment
TL;DR: In this paper, a preliminary study of the charge collection in the recently proposed Monolithic Active Pixel Sensor devices for minimum ionising particles tracking is presented, where the baseline pixel architecture is similar to a visible light CMOS camera, emerged as a competitor to widespread CCDs.
Abstract: A preliminary study of the charge collection in the recently proposed Monolithic Active Pixel Sensor devices for minimum ionising particles tracking is presented. The baseline pixel architecture is similar to a visible light CMOS camera, emerged as a competitor to widespread CCDs. Free electrons created by an impinging particle are collected by a photodiode from a thin partially depleted epitaxial silicon layer allowing 100% of fill-factor. Such a structure is fabricated using standard CMOS process. The sensor and associated readout electronics are integrated onto the same wafer, resulting in a low cost, high resolution and possibly thin detector. The crucial points of a CMOS detector are the time and the efficiency of the charge collection. These factors, in spite of undeniable advantages of CMOS detectors, can limit their performances. The detailed 3-D simulations using commercially available ISE-TCAD package are carried out in order to study a charge collection process. Although it is dominated by thermal diffusion, more than 1000 electrons are collected in the 3×3 pixels cluster within a time of 100 ns in a 15 μm thick epitaxial layer. Simulation results are compared to measurements performed on the prototype APS CMOS MIMOSA using either a fast Infrared (IR) laser or a high-energy particle beam as an excitation source.
60 citations