Design and use of a system-level specification and verification methodology
Cites background from "Design and use of a system-level sp..."
...We observe that in hardware development, where the use of component technologies is much more widespread than software, extensive use is made of models and simulation of proposed systems [6, 16, 23]....
Cites methods from "Design and use of a system-level sp..."
...We show how a formal model can be sympathetic to this type of architecture using our tool, RolEnact and explain how this may be related to a COM implementation....
"Design and use of a system-level sp..." refers background in this paper
...One way to compress and effectively manage the complete product timescale is to formally capture the design earlier in the design cycle so that it can be verified earlier, and problems conforming to the requirement specification solved before reaching the later phases of the design cycle....