Design of an FPGA based intelligence traffic light controller with VHDL
01 Dec 2012-pp 92-97
TL;DR: This paper concerned with an FPGA design implementation of a low cost 24-hour advanced traffic light controller system that has been successfully tested and implemented in hardware using Xilinx Spartan 3E and Virtex 5 FPG a.
Abstract: Traffic lights, which may also be known as stoplights, traffic lamps, traffic signals, stop-and-go lights robots or semaphore are signaling devices positioned at road intersections, pedestrian crossings and other locations to control competing flows of traffic[1]. Traffic lights assign the right of way to road users by the use of lights in standard colors. Traffic light controller establishes a set of rules and instructions that drivers, pilots, train engineers, and ship captains rely on to avoid collisions and other hazards. Traffic control systems include signs, lights and other devices that communicate specific directions, warnings, or requirements. Traffic light controller (TLC) has been implemented using microcontroller, FPGA, and ASIC design. FPGA has many advantages over microcontroller, some of these advantages are; the speed, number of input/output ports and performance which are all very important in TLC design, at the same time ASIC design is more expensive than FPGA. Most of the TLCs implemented on FPGA are simple ones that have been implemented as examples of FSM(Finite State Machine). This paper concerned with an FPGA design implementation of a low cost 24-hour advanced traffic light controller system. The system has been successfully tested and implemented in hardware using Xilinx Spartan 3E and Virtex 5 FPGA. But the sensor and camera interfacing(which remains as future scope) is not done yet, manually the data corresponding to the sensors were given. The system has many advantages over the exciting TLC's on most of the parts of the world[2].
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10 Oct 2011TL;DR: In this paper, the authors present a control system for a refuse vehicle and a method for controlling it provided with at least one refuse container location sensor, at least vehicle speed control, and one or more electronics.
Abstract: The present invention relates to a control system for a refuse vehicle and a method for controlling a refuse vehicle provided with at least one refuse container location sensor, at least one vehicle speed control, and one or more electronics. The one or more electronics receive and process signals from the at least one refuse container location sensor and outputs a control signal to the at least one vehicle speed control to stop the refuse vehicle at a predetermined location with respect to a refuse container.
11 citations
TL;DR: The current work is stepping toward a better understanding of the current relation between the needs of the industry and the suitable technologies, providing in-depth analysis on the most recent paradigms developed for data transmission, taking in consideration the real-time capabilities and use-cases of high concern in automation and automotive domains.
Abstract: With the recent advances in the area of OPC UA interfacing and the continuously growing requirements of the industrial automation world, combined with the more and more complex configurations of ECUs inside vehicles and services associated to car to infrastructure and even car to car communications, the gap between the two domains must be analyzed and filled. This gap occurred mainly because of the rigidness and lack of transparency of the software-hardware part of the automotive sector and the new demands for car to infrastructure communications. The issues are related to protocols as well as to conceptual views regarding requirements and already adopted individual directions. The industrial world is in the Industry 4.0 era, and in the Industrial Internet of Things context, its key interfacing enabler is OPC UA. Mainly to accommodate requirements related, among others, to high volumes, transfer rates, larger numbers of nodes, improved coordination and services, OPC UA enhances within its specifications the Publish-Subscribe mechanism and the TSN technology. In the OPC UA context, together with the VSOME/IP Notify-Subscribe mechanism, the current work is stepping toward a better understanding of the current relation between the needs of the industry and the suitable technologies, providing in-depth analysis on the most recent paradigms developed for data transmission, taking in consideration the real-time capabilities and use-cases of high concern in automation and automotive domains, and toward obtaining a VSOME/IP-OPC UA Gateway that includes the necessary characteristics and services in order to fill the protocol-related gap between the above mentioned fields. The developed case study results are proving the efficiency of the concept and are providing a better understanding regarding the impact between ongoing solutions and future requirements.
10 citations
Cites background or methods from "Design of an FPGA based intelligenc..."
...As mentioned in [7], to avoid collisions and other hazards, the drive is relying on a set of rules and instructions set by the traffic light controller....
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...In [7], the traffic light controller (TLC) was implemented using microcontroller, Field-Programmable Gate Array (FPGA), and Application Specific Integrated Circuit (ASIC) design....
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TL;DR: The practical side of the laboratory with Field-Programmable Gate Array (FPGA) design, where the students will conceive, simulate, synthesize and implement the circuits already studied in the initial approach that used simulation followed by integrated circuits practical design.
Abstract: The paper describes the adaptation of the Computer Architecture laboratory works given at the Faculty of Engineering in Foreign Languages from the University POLITEHNICA of Bucharest to the new trends in digital logic design. The laboratories are given in a gradual approach, starting with simulation, continuing with breadboard design and finishing with circuits made on perf-board. We are preparing now to complement the practical side of the laboratory with Field-Programmable Gate Array (FPGA) design, where the students will conceive, simulate, synthesize and implement the circuits already studied in the initial approach that used simulation followed by integrated circuits practical design.
6 citations
TL;DR: A design scheme of a real-time control system for road intelligent traffic lights based on FPGA based on polling control model is proposed, which controls road traffic and makes the main and branch roads coordinate and cooperate, thereby improving the traffic efficiency of the intersection.
Abstract: The use
of fixed-time traffic lights for road traffic control has the disadvantage of
low traffic efficiency. In order to optimize the vehicle traffic at the
intersection, this paper proposes a design scheme of a real-time control system
for road intelligent traffic lights based on FPGA. The system adopts the
polling control model, the vehicle detector detects the arrival rate of vehicles,
and obtains the corresponding traffic light green time length according to the
traffic rules and polling model theory. Using Altera’s
Cyclone IV series EP4CE15E22C8 chip as the development platform, a specific
design plan is given. The circuit mainly includes program-controlled amplifier
module, AD acquisition module, cross-correlation calculation module, serial
port transmission and Lab-VIEW module. The system can realize the intelligent
adjustment of traffic lights. Different vehicle arrival rates are detected at
different times, so that the corresponding traffic light configuration time
length changes accordingly. This intelligent adjustment controls road traffic
and makes the main and branch roads coordinate and cooperate, thereby improving
the traffic efficiency of the intersection.
2 citations
Cites background from "Design of an FPGA based intelligenc..."
...How to make the control of traffic lights more reasonable and maximize the effectiveness of existing traffic resources has become a common concern for city managers and scientific and technological workers [2]....
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01 Aug 2017
TL;DR: An idea of a traffic control light system which can adapt to variations in traffic volumes, and make the lights vary its durations in accordance with the traffic conditions is presented.
Abstract: Traffic Control has been a major problem in most of the cities. A most commonly experienced situation is that even when there are no more vehicles in the road currently under green light, the green light continues until its counter is over, thereby making unnecessary wait for the people in other roads of the junction. This paper presents an idea of a traffic control light system which can adapt to variations in traffic volumes, and make the lights vary its durations in accordance with the traffic conditions. Also, the implementation cost of the system is low it is based on an 8-bit microcontroller. The proposed system is fully automatic, independent and can be used for any junctions without any modifications.
2 citations
Cites methods from "Design of an FPGA based intelligenc..."
...Study to improve traffic controls using FPGA is also reported [8]....
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References
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01 Sep 2007
TL;DR: This paper concerned with an FPGA design implementation of a low cost 24-hour advanced traffic light controller system that was built as a term project of a VLSI design subject using VHDL and has been successfully tested and implemented in hardware using Xilinx Spartan 3 FPGa.
Abstract: Traffic light controller establishes a set of rules and instructions that drivers, pilots, train engineers, and ship captains rely on to avoid collisions and other hazards. Traffic control systems include signs, lights and other devices that communicate specific directions, warnings, or requirements. Traffic light controller (TLC) has been implemented using microcontroller FPGA, and ASIC design. FPGA has many advantages over microcontroller, some of these advantages are; the speed, number of input/output ports and performance which are all very important in TLC design, at the same time ASIC design is more expensive than FPGA. Most of the TLCs implemented on FPGA are simple ones that have been implemented as examples of FSM. This paper concerned with an FPGA design implementation of a low cost 24-hour advanced traffic light controller system that was built as a term project of a VLSI design subject using VHDL. The implemented traffic light is one of the real and complex traffic lights in Kingdom of Bahrain, for four roads and motorway with sensors and camera. The system has been successfully tested and implemented in hardware using Xilinx Spartan 3 FPGA. The system has many advantages over the exciting TLC.
46 citations
"Design of an FPGA based intelligenc..." refers background in this paper
...FPGA has many advantages over microcontroller, some of these advantages are; the speed, number of input/output ports and performance which are all very important in TLC design, at the same time ASIC design is more expensive than FPGA....
[...]
28 Oct 2002
TL;DR: The intelligence traffic light controller is considered for the busy time on the road when people are going to work and the traffic light timing control and the efficiency of the ITLC can achieve a maximum 36%.
Abstract: The intelligence traffic light controller is considered for the busy time on the road when people are going to work and the traffic light timing control Traffic congestion increases because the current traffic light controller only allocates a fixed time control ITLC can reduce the waste time to drivers on the road In this paper the traffic lights of main roads are controlled with fixed time while narrow roads are controlled autonomously by sensors ITLC's efficiency is increased when there are fewer vehicles on the narrow road The experimental result shows that the efficiency of the ITLC can achieve a maximum 36%
17 citations
26 Dec 2009
TL;DR: Dual-Mode Traffic Light Control System based on the different times of intelligent control of traffic lights-off time for the various road junctions improves the efficiency of the junction scheduling.
Abstract: The Red-Green light system is an important traffic control system, widely used in urban traffic management. Traffic light control systems need to achieve automatic control function at the junction changes. Traffic lights control system designed by single-chip computer work at a single mode, it is not easy to be upgraded or change device size. The reliability is low, slow and difficult to adapt the traffic flow at different times of the daily changes. Dual-Mode Traffic Light Control System based on the different times of intelligent control of traffic lights-off time for the various road junctions improves the efficiency of the junction scheduling. FPGA Design Based on dual-mode traffic light control system has a simple circuit, high reliability and computing speed, scalability, as well as reconfiguration of good characteristics.
10 citations
"Design of an FPGA based intelligenc..." refers background in this paper
...Our paper also claims the novelty of a huge reduction in the resource consumption by multiple order as shown in table 4 of section VI. Paper [10, 11] shows low cost 24-hour advanced traffic light controller system and a dual-mode Traffic Light Control System based on the different times of…...
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10 Jun 2011
TL;DR: This paper proposed a design of a modern FPGA-based Traffic Light Control (TLC) System to manage the road traffic by controlling the access to areas shared among multiple intersections and allocating effective time between various users; during peak and off-peak hours.
Abstract: This paper proposed a design of a modern FPGA-based Traffic Light Control (TLC) System to manage the road traffic. The approach is by controlling the access to areas shared among multiple intersections and allocating effective time between various users; during peak and off-peak hours. The implementation is based on real location in a city in Malaysia where the existing traffic light controller is a basic fixed-time method. This method is inefficient and almost always leads to traffic congestion during peak hours while drivers are given unnecessary waiting time during off-peak hours. The proposed design is a more universal and intelligent approach to the situation and has been implemented using FPGA. The system is implemented on ALTERA FLEX10K chip and simulation results are proven to be successful. Theoretically the waiting time for drivers during off-peak hours has been reduced further, therefore making the system better than the one being used at the moment. Future improvements include addition of other functions to the proposed design to suit various traffic conditions at different locations.
9 citations
22 Apr 2011
TL;DR: The purpose of this paper is to flush out the concept of nondynamic traffic light controller TLC existing in INDIA and other developing nations to save time and smoothen the traffic flow by avoiding heavy rush in this densely populated country.
Abstract: This paper deals with more efficient and effective way of handling the random and busy traffic pattern on Indian roads. The purpose of this paper is to flush out the concept of nondynamic traffic light controller TLC (with fixed counters irrespective of traffic intensity) existing in INDIA and other developing nations. This AD-TLC concept will save time and will smoothen the traffic flow by avoiding heavy rush in this densely populated country. The proposed TLC is more appropriate as road selection has been suitably prioritized on the basis of traffic intensity. The AD-TLC is designed using FSM with 32 states including a total of 255 possible combinations of active sensors. The design has been deployed in FPGA.
8 citations