Book ChapterDOI
Design of Arithmetic and Logic Unit (ALU) Using Subthreshold Adiabatic Logic for Low-Power Application
Anagh Deshpande,T. Vigneswaran +1 more
- pp 201-209
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TLDR
The performance of ALU designed by subthreshold adiabatic logic is compared with standard CMOS logic and standardCMOS logic during this work.Abstract:
As density and size of VLSI chips still increase, the power consumption has become an important concern. The CMOS circuit with nominal supply voltage operating in high frequency consumes more power. The fashionable applications like mobile systems, sensing element networks need low power consumptions. In subthreshold logic, the circuit operates with voltage which is below transistor threshold voltage and it utilizes the subthreshold current as operating current. Adiabatic logic can even enforce in subthreshold regime to cut back dynamic power consumption considerably. ALU is one in all basic block within the low-cost electronic equipment. It consumes heap of power by continuous computation. So, it’s important to cut back power consumption for higher performance. During this work, Arithmetic and Logic Unit is designed by subthreshold adiabatic logic and standard CMOS logic. The performance of ALU designed by subthreshold adiabatic logic is compared with standard CMOS logic. In order to simulate the circuits, Cadence virtuoso environment is used for 180 nm technology.read more
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Journal ArticleDOI
Design and Performance Evaluation of Energy Efficient 8-Bit ALU At Ultra Low Supply Voltages Using FinFET With 20nm Technology
TL;DR: Power efficient 8-bit ALU is designed with Full adder (FA) and multiplexers composed of Gate diffusion input (GDI) which gained designer's choice for digital combinational circuit realization at minimum power consumption.
References
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Digital Integrated Circuits A Design Perspective
TL;DR: The digital integrated circuits a design perspective is universally compatible with any devices to read, and is available in the digital library an online access to it is set as public so you can get it instantly.
Book
Sub-threshold Design for Ultra Low-Power Systems
TL;DR: The EKV Model of the MOS Transistor is used as a model for low-voltage circuit design and analog Circuits in Weak Inversion are studied.
Journal ArticleDOI
An efficient charge recovery logic circuit
Yong Moon,Deog-Kyoon Jeong +1 more
TL;DR: Efficient charge recovery logic (ECRL) is proposed as a candidate for low-energy adiabatic logic circuit and shows four to six times power reduction with a practical loading and operation frequency range.
Proceedings Article
Robust subthreshold logic for ultra-low power operation
TL;DR: In this paper, variable threshold voltage sub-threshold CMOS (VT-Sub-CMOS) and subthreshold dynamic threshold voltage MOS (Sub-DTMOS) were proposed.