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Journal ArticleDOI

Design of Planar Rectangular Microelectronic Inductors

H. Greenhouse1
01 Jun 1974-IEEE Transactions on Parts, Hybrids, and Packaging (IEEE)-Vol. 10, Iss: 2, pp 101-109
TL;DR: In this paper, the authors derived inductance equations for planar thin- or thick-film coils, comparing equations that include negative mutual inductance with those that do not, and presented a computer program developed for calculating inductances for both square and rectangular geometries, the variables considered being track width, space between tracks, and number of turns.
Abstract: Negative mutual inductance results from coupling between two conductors having current vectors in opposite directions As a quantity in electronic circuits, negative mutual inductance is usually so much smaller in magnitude than overall inductance that it can be neglected with little effect In the microelectronic world, however, its neglect can result in inductance values as much as 30 percent too high This paper derives inductance equations for planar thin- or thick-film coils, comparing equations that include negative mutual inductance with those that do not It describes a computer program developed for calculating inductances for both square and rectangular geometries, the variables considered being track width, space between tracks, and number of turns Graphic results are presented for up to 16 turns over an inductance range of 3 nanohenries to 10 microhenries Although details of fabrication are not included, the effects of film thickness and frequency on the mutual-inductance parameter are discussed
Citations
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Journal ArticleDOI
TL;DR: In this paper, the authors present simple and accurate expressions for the DC inductance of square, hexagonal, octagonal, and circular spiral inductors, and evaluate the accuracy of their expressions, as well as several previously published inductance expressions, in two ways: by comparison with three-dimensional field solver predictions and by contrast with their own measurements, and also previously published measurements.
Abstract: We present several new simple and accurate expressions for the DC inductance of square, hexagonal, octagonal, and circular spiral inductors. We evaluate the accuracy of our expressions, as well as several previously published inductance expressions, in two ways: by comparison with three-dimensional field solver predictions and by comparison with our own measurements, and also previously published measurements. Our simple expression matches the field solver inductance values typically within around 3%, about an order of magnitude better than the previously published expressions, which have typical errors ground 20% (or more). Comparison with measured values gives similar results: our expressions (and, indeed, the field solver results) match within around 5%, compared to errors of around 20% for the previously published expressions. (We believe most of the additional errors in the comparison to published measured values is due to the variety of experimental conditions under which the inductance was measured.) Our simple expressions are accurate enough for design and optimization of inductors or of circuits incorporating inductors. Indeed, since inductor tolerance is typically on the order of several percent, "more accurate" expressions are not really needed in practice.

1,498 citations


Cites methods from "Design of Planar Rectangular Microe..."

  • ...Another technique is to use the Greenhouse method [2], [5], [6] to compute the inductance....

    [...]

Journal ArticleDOI
TL;DR: In this paper, a patterned ground shield is inserted between an on-chip spiral inductor and silicon substrate to increase the quality of a 2 GHz LC tank by up to 33% and reduce substrate coupling between two adjacent inductors.
Abstract: This paper presents a patterned ground shield inserted between an on-chip spiral inductor and silicon substrate. The patterned ground shield can be realized in standard silicon technologies without additional processing steps. The impacts of shield resistance and pattern on inductance, parasitic resistances and capacitances, and quality factor are studied extensively. Experimental results show that a polysilicon patterned ground shield achieves the most improvement. At 1-2 GHz, the addition of the shield increases the inductor quality factor up to 33% and reduces the substrate coupling between two adjacent inductors by as much as 25 dB. We also demonstrate that the quality factor of a 2-GHz LC tank can be nearly doubled with a shielded inductor.

1,197 citations


Cites methods from "Design of Planar Rectangular Microe..."

  • ...represents the spiral inductance which can be computed using the Greenhouse method [7]....

    [...]

Journal ArticleDOI
TL;DR: In this article, the authors present a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance in the spiral, substrate ohmic loss, and substrate capacitance.
Abstract: This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance.

867 citations


Cites methods from "Design of Planar Rectangular Microe..."

  • ...Based on Grover’s formulas, Greenhouse developed an algorithm for computingthe inductance of planar rectangular spirals [15]....

    [...]

Journal ArticleDOI
J.R. Long1
TL;DR: A comprehensive review of the electrical performance of passive transformers fabricated in silicon IC technology is presented, and the characteristics of two-port and multiport transformers and baluns are presented from both computer simulation and experimental measurements.
Abstract: A comprehensive review of the electrical performance of passive transformers fabricated in silicon IC technology is presented. Two types of transformer construction are considered in detail, and the characteristics of two-port (1:1 and 1:n turns ratio) and multiport transformers (i.e., baluns) are presented from both computer simulation and experimental measurements. The effects of parasitics and imperfect coupling between transformer windings are outlined from the circuit point of view. Resonant tuning is shown to reduce the losses between input and output at the expense of operating bandwidth. A procedure for estimating the size of a monolithic transformer to meet a given specification is outlined, and circuit examples are used to illustrate the applications of the monolithic transformer in RF ICs.

780 citations

Proceedings ArticleDOI
Yue1, Wong1
12 Jun 1997
TL;DR: In this paper, a patterned ground shield is proposed to reduce the unwanted substrate effects by shielding the electric field of an on-chip spiral inductor from the silicon substrate, which can be realized in standard silicon technologies without additional processing steps.
Abstract: This paper presents a patterned ground shield in- serted between an on-chip spiral inductor and silicon substrate. The patterned ground shield can be realized in standard silicon technologies without additional processing steps. The impacts of shield resistance and pattern on inductance, parasitic resistances and capacitances, and quality factor are studied extensively. Experimental results show that a polysilicon patterned ground shield achieves the most improvement. At 1-2 GHz, the addition of the shield increases the inductor quality factor up to 33% and reduces the substrate coupling between two adjacent inductors by as much as 25 dB. We also demonstrate that the quality factor of a 2-GHz tank can be nearly doubled with a shielded inductor. In this paper, we present a patterned ground shield, which is compatible with standard silicon technologies, to reduce the unwanted substrate effects. To provide some background, Section II presents a discussion on the fundamental definitions of an inductor and an tank . Next, a physical model for spiral inductors on silicon is described. The magnetic energy storage and loss mechanisms in an on-chip inductor are discussed. Based on this insight, it is shown that energy loss can be reduced by shielding the electric field of the inductor from the silicon substrate. Then, the drawbacks of a solid ground shield are analyzed. This leads to the design of a patterned ground shield. Design guidelines for parameters such as shield pattern and resistance are given. In Section III, experiment design, on-wafer testing technique, and parasitic extraction procedure are presented. Experimental results are then reported to study the effects of shield resistance and pattern on inductance, parasitic resistances and capacitances, and inductor . Next, the improvement in of a 2-GHz tank using a shielded inductor is illustrated. A study of the noise coupling between two adjacent inductors and the efficiency of the ground shield for isolation are also presented. Lastly, Section IV gives some conclusions.

736 citations


Cites methods from "Design of Planar Rectangular Microe..."

  • ...represents the spiral inductance which can be computed using the Greenhouse method [7]....

    [...]

References
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Journal ArticleDOI
TL;DR: In this article, the theoretical background and techniques for constructing multipurpose miniature thin-film inductors are presented, and the geometric form of the conducting spiral is optimized to give the minimum power dissipation.
Abstract: The theoretical background and techniques for constructing multipurpose miniature thin-film inductors are presented. These inductors use a thin-film gold spiral encapsulated with deposited ferrite film and present Q values of 100 in the range of 1-1200 µH. The ferrite film is deposited from thermal decomposition of an iodine solution containing the desired metal cations. The magnetic and electric properties of the deposited ferrite films are presented. A technique for etching the gold conducting spiral is described. The geometric form of the conducting spiral is optimized to give the minimum power dissipation. Skin-effect losses, eddy-current losses, hysteresis losses, and the total dissipation factor of the inductors are derived theoretically and compared with the experimental results. The frequency, current, and temperature characteristics of the thin-film planar inductors are fully described.

23 citations