Patent•
Die paddle enhancement for exposed pad in semiconductor packaging
02 Aug 2001-
TL;DR: In this paper, a new design for the die-paddle that is used as part of a package for packaging semiconductor devices is presented, which creates a space between the ground ring of the diepaddle and the surface over which the ground paddle is mounted.
Abstract: A new design is provided for the die-paddle that is used as part of a package for packaging semiconductor devices. The new design of the invention creates a space between the ground ring of the die-paddle and the surface over which the ground paddle is mounted. The new design further comprises an S-shaped segment between the ground ring and the center of the die-paddle, the S-shaped segment provides stress relieve between the ground ring and the center of the die-paddle.
Citations
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Patent•
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.
1,501 citations
Patent•
01 Oct 2007TL;DR: In this paper, a semiconductor package comprising a bottom semiconductor substrate and a top semiconductor top substrate is mounted to the package body and electrically connected to the conductive metal within the via(s) of the package.
Abstract: The present invention comprises a semiconductor package comprising a bottom semiconductor package substrate which is populated with one or more electronic components. The electronic component(s) of the bottom substrate are covered or encapsulated with a suitable mold compound which hardens into a package body of the semiconductor package. The package body is provided with one or more vias through the completion of laser drilling process, such via(s) providing access to one or more corresponding conductive contacts of the bottom substrate. These vias are either lined or partially filled with a conductive metal material. Subsequently, a top semiconductor package substrate (which may optionally be populated with one or more electronic components) is mounted to the package body and electrically connected to the conductive metal within the via(s) of the package body.
235 citations
Patent•
13 Oct 2000
TL;DR: The Micro Lead Frame (MLF) as discussed by the authors allows the semiconductor packages to be stacked on top of each other, and the protruding parts of the leads form a space between the stacked semiconductor package for improved heat dissipation.
Abstract: Micro lead frame (MLF)-type semiconductor packages that allow the semiconductor packages to be stacked on top of each other. One aspect of the semiconductor package includes a leadframe, a plurality of electrical connectors, a semiconductor chip, and a sealing material for encapsulating the above components. The leadframe has a plurality of leads, with each one of the plurality of leads running from the top of the semiconductor package to the bottom of the semiconductor package. Each one of the plurality of leads has a top portion protruding from the top surface of the semiconductor package and a bottom portion protruding from the bottom surface of the semiconductor package. The leads allow for electrical connection of a second semiconductor package placed on top of the first semiconductor package. Further, the protruding parts of the leads form a space between the stacked semiconductor packages for improved heat dissipation.
229 citations
Patent•
01 Mar 2006
TL;DR: In this article, a lead frame for making a semiconductor package is described, which includes a lead lock provided at a free end of each inner lead that is adapted to increase a bonding force of the inner lead to a resin encapsulate.
Abstract: A lead frame for making a semiconductor package is disclosed. The leadframe's leads include a lead lock provided at a free end of each inner lead that is adapted to increase a bonding force of the inner lead to a resin encapsulate, thereby effectively preventing a separation of the inner lead from occurring in a singulation process involved in the fabrication of the semiconductor package. A semiconductor package fabricated using the lead frame and a fabrication method for the semiconductor package are also disclosed. The lead frame includes a paddle, a plurality of tie bars for supporting the corners of the paddle, a plurality of leads arranged at each of four sides or two facing sides of the paddle in such a fashion that they are spaced apart from an adjacent side of the paddle while extending perpendicularly to the associated side of the paddle, each of the leads having lead separation preventing means adapted to increase a bonding force of the lead to a resin encapsulate subsequently molded to encapsulate the lead frame for fabrication of the semiconductor package, and dam bars for supporting the leads and the tie bars. Additional package embodiments include exposed protrusions extending downward from the leads. The exposed protrusions are irradiated with a laser to remove set resin prior to a solder ball attachment step.
178 citations
Patent•
10 Jan 2003TL;DR: In this paper, a mounting for a package containing a semiconductor chip is described, along with methods of making such a mounting, and the package is mounted on the substrate so that the cap is in the aperture, and a peripheral portion of the first side of the base is over the mounting surface so as to support the package in an aperture and allow the input/output terminals of the package to be juxtaposed with to the circuit patterns of the substrate.
Abstract: A mounting for a package containing a semiconductor chip is disclosed, along with methods of making such a mounting. The mounting includes a substrate having a mounting surface with conductive traces thereon, and an aperture extending through the substrate. The package includes a base, such as a leadframe or a laminate sheet, and input/output terminals. A chip is on a first side of the base and is electrically connected (directly or indirectly) to the input/output terminals. A cap, which may be a molded encapsulant, is provided on the first side of the base over the chip. The package is mounted on the substrate so that the cap is in the aperture, and a peripheral portion of the first side of the base is over the mounting surface so as to support the package in the aperture and allow the input/output terminals of the package to be juxtaposed with to the circuit patterns of the mounting surface. Because the cap is within the aperture, a height of the package above the mounting surface is minimized.
149 citations
References
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Patent•
12 Aug 1998TL;DR: In this article, the die and the substrate are interconnected by means of signal transferring means. And the die is attached to the substrate by a die paddle and a power ring is formed around the die paddle on the surface of the substrate.
Abstract: The present invention includes a substrate having a die adhered thereon. The die and the substrate are interconnected by means of signal transferring means. Solder bumps are formed on the bottom side surface of the substrate. Molding compound is encapsulated among the substrate, the die and a heat spreader. A heat spreader is arranged over the top surface of the substrate. The heat spreader includes a plane having four supporting members that are set on the bottom side of the plane and at the corners of the plane. The supporting members are protruded from the plane to connect the heat spreaders and the substrate. The heat spreader further includes a protruded portion. A further supporting member is formed on the central portion of the protruded portion. The substrate has a die paddle formed thereon for receiving the die. A power ring is formed around the die paddle on the surface of the substrate for power input. A ground ring formed around the power ring on the substrate has ground pads. The supporting members of the heat spreader are connected on the ground pads by using the heat spreader attach material.
243 citations
Patent•
15 Jun 1999
TL;DR: In this paper, a plastic encapsulated semiconductor device consisting of a die pad, die pad support pins, a semiconductor chip mounted on the die pad and thin metal wires for connecting the electrode of the semiconductor chips to leads, while the respective bottom faces of the leads forming terminal portions are exposed.
Abstract: A plastic encapsulated semiconductor device comprises a die pad, die pad support pins suspending the die pad, a semiconductor chip mounted on the die pad, thin metal wires for connecting the electrode of the semiconductor chip to leads, and a sealing resin sealing the foregoing components, while the respective bottom faces of the leads forming terminal portions are exposed. An upset process is performed with respect to the die pad support pins of a lead frame to form stepped portions such that the die pad is positioned higher in level than the leads. Since the lower portion of the sealing resin also underlies the die pad, enhanced adhesion is achieved between the die pad and the sealing rein, resulting in higher reliability. With the die pad positioned higher in level than the leads, there is no possibility of interference between the leads and the semiconductor chip even when the size of the semiconductor chip is freely changed. This enables the scaling up of a semiconductor chip and increases a packaging density in mounting semiconductor devices on a mother substrate.
176 citations
Patent•
IBM1
TL;DR: In this article, a semiconductor chip having a plurality of signal sites and ground sites is positioned on the semiconductor chips support of the leadframe, and each of the signal leads is electrically isolated from each other and from the common ground portion of leadframe.
Abstract: A method of making an electronic package. The method includes the step providing a leadframe of a single layer of material. The leadframe includes a semiconductor chip support, a plurality of signal leads, and a common ground portion substantially surrounding the chip support portion. A semiconductor chip having a plurality of signal sites and a plurality of ground sites is positioned on the semiconductor chip support of the leadframe. Selected ones of the signal sites of the semiconductor chip are selectively electrically connected to respective ones of the signal leads of the lead frame and selective ones of the ground sites of the semiconductor chip are selectively electrically connected to the common ground portion of the leadframe. Each of the signal leads of the leadframe are electrically isolated from each other and from the common ground portion of the leadframe.
163 citations
Patent•
05 Nov 1999TL;DR: In this article, the authors describe a method of making a substrate for making integrated circuit device packages and substrates for making the packages, which is based on an unpatterned sheet of polyimide material having a first surface and an opposite second surface.
Abstract: Methods of making integrated circuit device packages and substrates for making the packages are disclosed. An embodiment of a method of making a substrate includes providing an unpatterned sheet of polyimide material having a first surface and an opposite second surface. A planar metal layer is attached to the second surface of the polyimide sheet. The metal layer is patterned to form an array of package sites, with each site including a planar die pad and planar leads. Apertures are formed through the polyimide sheet, either before or after attaching the metal layer. Each aperture is juxtaposed with a lead allowing access thereto. A method of making a package using the substrate includes mounting an integrated circuit device above the die pad (e.g., on the substrate or on the die pad through an aperture in the substrate). Bond wires are connected between the integrated circuit device and the leads through the apertures. An insulative encapsulant is applied so as to cover the integrated circuit device and fill the apertures. A method of making multiple packages includes a final step of cutting an encapsulated array of package sites with a saw to separate individual packages.
54 citations