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Digital Systems Testing and Testable Design

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TLDR
The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.
Abstract
For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.

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Journal ArticleDOI

BIST-based test and diagnosis of FPGA logic blocks

TL;DR: In this article, the authors present a built-in self-test (BIST) approach able to diagnose all single and practically all multiple faulty programmable logic blocks (PLBs) in field programmable gate arrays (FPGAs) with maximum diagnostic resolution.
Proceedings ArticleDOI

An observability-based code coverage metric for functional simulation

TL;DR: A new metric for measuring the extent of design verification provided by a set of functional simulation vectors is proposed, which can be used uniformly for all designs and computes observability information to determine whether effects of errors that are activated by the program stimuli can be observed at the circuit outputs.
Book

Advanced Formal Verification

TL;DR: A comparison of SAT and BDD Approaches: Are they Different?
Proceedings ArticleDOI

A mixed mode BIST scheme based on reseeding of folding counters

TL;DR: The proposed scheme relies on a new type of test pattern generator which resembles a programmable Johnson counter and is called folding counter and outperforms previously published approaches based on the reseeding of LFSRs or Johnson counters.
Proceedings ArticleDOI

A fault oriented partial scan design approach

TL;DR: The authors propose a fault oriented partial scan design methodology to be performed as a sequel to test generation by analytically selecting only 10-20% of the flip-flops which are most likely to improve the quality of test generation.