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Digital Systems Testing and Testable Design

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TLDR
The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.
Abstract
For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.

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Proceedings ArticleDOI

Obtaining high fault coverage with circular BIST via state skipping

Nur A. Touba
TL;DR: Results indicate that in many cases, this approach can boost the fault coverage of circular BIST to match that of conventional parallel BIST approaches while still maintaining a significant advantage in terms of hardware overhead and control complexity.
Proceedings ArticleDOI

Extraction based verification method for off the shelf integrated circuits

TL;DR: The proposed approach is based on the construction of a high-level description of the packaged IC and on using the extracted description to validate the specifications and re-constructed over 90% of the system functions for an example IC.
Proceedings ArticleDOI

Dynamic fault collapsing and diagnostic test pattern generation for sequential circuits

TL;DR: Improvements are achieved by developing results that permit dynamic, fully functional collapsing of candidate faults that are used to develop a diagnostic test pattern generation algorithm that has the same order of complexity as that of detection oriented test generation (ATPG).
Proceedings ArticleDOI

System-level fault modeling and test pattern generation with process algebras

TL;DR: This paper advocates the use of process algebras as a mathematically sound formalism to describe, validate, verify, and generate test patterns at system level to define a general-purpose fault model of faulty communications between fault-free, concurrently evolving processes.
Proceedings ArticleDOI

Color counting and its application to path delay fault coverage

TL;DR: A new technique that consists of appropriate formation and counting of colors is proposed for computing exact fault coverage for any fault model and results show improvement over the existent techniques for the path delay fault model.