Open AccessBook
Digital Systems Testing and Testable Design
Reads0
Chats0
TLDR
The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.Abstract:
For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.read more
Citations
More filters
Proceedings ArticleDOI
On automatic generation of RTL validation test benches using circuit testing techniques
Indradeep Ghosh,Srivaths Ravi +1 more
TL;DR: This paper examines how good validation test benches can be automatically generated starting from the RTL description of a circuit and develops the methodology based on extensive experiments performed with several popular benchmarks as well as industrial circuits.
Proceedings ArticleDOI
RTL Test Point Insertion to Reduce Delay Test Volume
K.J. Balakrishnan,Lei Fang +1 more
TL;DR: The number of specified bits required to test transition faults is reduced thus improving test set compaction and the advantage of test point insertion at RTL is that the extra delay due to multiplexers can be absorbed during logic synthesis.
Proceedings ArticleDOI
On SAT-based Bounded Invariant Checking of Blackbox Designs
Marc Herbstritt,Bernd Becker +1 more
TL;DR: This work analyzes how BMC can be applied to partial designs and proposes a SAT-solver that directly can handle 01X-logic and shows that even with the most simple modelling scheme, namely01X-simulation, a relevant number of errors can be detected.
Proceedings ArticleDOI
Leakage current reduction in sequential circuits by modifying the scan chains
TL;DR: This paper uses the built-in scan-chain in a VLSI circuit to drive it with the minimum leakage vector when it enters the sleep mode, and eliminates the area and delay overhead of the additional circuitry that would otherwise be needed to apply theminimum leakage vector to the circuit.
Proceedings ArticleDOI
Multiple fault diagnosis with BDD based boolean differential equations
TL;DR: A novel 5-valued algebra is introduced for simplifying differential equations, and a discussion is presented how this approach can be used as a basis for hierarchical fault diagnosis to cope with the complexity problem.