Book•
Digital Systems Testing and Testable Design
01 Jan 1990-
TL;DR: The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.
Abstract: For many years, Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems was the most widely used textbook in digital system testing and testable design. Now, Computer Science Press makes available a new and greativ expanded edition. Incorporating a significant amount of new material related to recently developed technologies, the new edition offers comprehensive and state-ofthe-art treatment of both testing and testable design.
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TL;DR: The design and experimental evaluation of an 8-bit energy-recovery multiplier with built-in self-test logic and an internal single-phase sinusoidal power-clock generator is presented.
Abstract: In this paper, we present the design and experimental evaluation of an 8-bit energy-recovery multiplier with built-in self-test logic and an internal single-phase sinusoidal power-clock generator. Both the multiplier and the built-in self-test have been designed in SCAL-D, a true single-phase adiabatic logic family. Fabricated in a 0.5-/spl mu/m standard n-well CMOS process, the chip has an active area of 0.47 mm/sup 2/. Correct chip operation has been verified for clock rates up to 140 MHz. Moreover, chip dissipation measurements correlate well with HSPICE simulation results. For a selection of biasing conditions that yield correct operation at 140 MHz, total measured average dissipation for the multiplier and the power-clock generator is 250 pJ per operation.
45 citations
01 Jun 1991
TL;DR: The single transition fault model is augmented by carefully selected multiple transition faults which potentially increase the coverage of single stuck-at faults and experimental results for stuck- at faults are presented.
Abstract: A complete method is presented for generating tests for sequential machines. The transition fault model is employed, and the machine is assumed to be described by a state table. The test generation algorithm described is polynomial in the size of the state table, and is complete and accurate in the following sense. For every given transition fault, the algorithm provides either a test, or a proof that the fault is undetectable. The relationship between transition faults and stuck-at faults is investigated. The single transition fault model is augmented by carefully selected multiple transition faults which potentially increase the coverage of single stuck-at faults. A method to achieve 100% fault efficiency for stuck-at faults is then proposed, and experimental results for stuck-at faults are presented.
45 citations
TL;DR: Through their simulation-based engineering (SBE) design partnership, Goodyear achieved a substantial competitive advantage in new product development and Sandia National Laboratories was able to solve previously intractable nuclear weapons design problems.
Abstract: Through their simulation-based engineering (SBE) design partnership, Goodyear achieved a substantial competitive advantage in new product development and Sandia National Laboratories was able to solve previously intractable nuclear weapons design problems. However, while other governments invest heavily in SBE for global competitiveness, the US has eliminated technical-transfer funding that was critical to establishing the Goodyear-Sandia partnership.
44 citations
TL;DR: A multiplexer-based Field-Programmable Gate Array (FPGA) is introduced which is designed to provide on-line self-test and self-repair using a completely distributed system and a minimal amount of additional logic.
44 citations
Cites background from "Digital Systems Testing and Testabl..."
...This definition by no means covers all possible electrical faults in a circuit (for example, a physical fault could cause lines to be left floating, that is, in a high-impedance state), but it does cover the most common, and the great majority of the research in the area of testing is concerned with this kind of faults [ 1 , 8, 10]....
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...[ 1 , 14]). The result is a system which is not perfect in any one respect, but provides what we feel is a reasonably well-balanced compromise....
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...The parallel with biological systems also imposed a third constraint: that the self-test occur on-line [ 1 ]....
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30 Sep 2003
TL;DR: A hybrid encoding strategy is presented which overcomes the problem of sparse runlength coding by combining both the advantages of run-length and dictionary-based encoding and minimizes the total size of the test data consisting of the encoded test set and the dictionary.
Abstract: Store-and-generate techniques encode a given test set and regenerate the original test set during the test with the help of a decoder. Previous research has shown that run-length coding, particularly alternating run-length coding, can provide high compression ratios for the test data. However, experimental data show that longer runlengths are distributed sparsely in the code space and often occur only once, which implies an ineficient encoding. In this study a hybrid encoding strategy is presented which overcomes this problem by combining both the advantages of run-length and dictionary-based encoding. The compression ratios strongly depend on the strategy of mapping don't cares in the original test set to zeros or ones. To find the best assignment an algorithm is proposed which minimizes the total size of the test data consisting of the encoded test set and the dictionary. Experimental results show that the proposed approach works particularly well for larger examples yielding a significant reduction of the total test data storage compared to pure alternating run-length coding.
44 citations