University of Groningen
Dynamics of threshold voltage shifts in organic and amorphous silicon field-effect transistors
Mathijssen, Simon G. J.; Colle, Michael; Gomes, Henrique; Smits, Edsger C. P.; de Boer,
Bert; McCulloch, Iain; Bobbert, Peter A.; de Leeuw, Dago M.; Cölle, Michael
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Advanced materials
DOI:
10.1002/adma.200602798
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Mathijssen, S. G. J., Colle, M., Gomes, H., Smits, E. C. P., de Boer, B., McCulloch, I., Bobbert, P. A., de
Leeuw, D. M., & Cölle, M. (2007). Dynamics of threshold voltage shifts in organic and amorphous silicon
field-effect transistors.
Advanced materials
,
19
(19), 2785-+. https://doi.org/10.1002/adma.200602798
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DOI: 10.1002/adma.200602798
Dynamics of Threshold Voltage Shifts in Organic and Amorphous
Silicon Field-Effect Transistors
By Simon G. J. Mathijssen, Michael Cölle, Henrique Gomes, Edsger C. P. Smits, Bert de Boer,
Iain McCulloch, Peter A. Bobbert, and Dago M. de Leeuw*
Progress in environmental stability and processability, and
the increase of the field-effect mobility of organic semiconduc-
tors has triggered their use as the active element in microelec-
tronic devices. The advantages of their application are the easy
processing, for example, spin-coating and ink-jet printing, with-
out a temperature hierarchy, and their mechanical flexibility.
Applications are foreseen in the field of large-area electronics
where numerous devices are integrated on low-cost substrates
such as plastics. The first flexible, even rollable, quarter video
graphics array (QVGA) active matrix displays based on organ-
ic semiconductors have already been reported.
[1]
In present commercial displays, amorphous silicon, a-Si, is
used as the active semiconductor. In order to be competitive,
organic transistors should exhibit the same performance with
respect to current modulation and electrical reliability. The
field-effect mobility of organic transistors is already compar-
able to that of a-Si-based transistors. Values of unity have been
demonstrated not only for evaporated organic semiconduc-
tors,
[2]
but also using solution-processed semiconductors.
[3,4]
In
this paper we discuss the electrical instability of organic tran-
sistors. We observe that the threshold-voltage shift shows a
stretched-exponential time dependence under an applied gate
bias. The relaxation time is observed to be in the order of 10
7
s
(ca. 4 months) at room temperature and is comparable to the
best values reported for a-Si-based transistors. The activation
energy is common for all other organic transistors reported so
far. The constant activation energy supports charge trapping
by residual water as the common origin. Quantitative analysis
shows that differences in reliability of organic transistors are
due to differences in the frequency prefactor.
The electrical instability of practical transistors is a device
parameter. It can be due to ionic displacements in the gate di-
electric; photo-oxidation under applied bias in an ambient at-
mosphere; or charge trapping at interfaces or at impurities in
the bulk, due to defect creation or water at the gate-dielec-
tric–semiconductor interface. Here we focus on the intrinsic
electrical instability. We use thermally grown SiO
2
as gate di-
electric and determine the dynamics of the electrical instabil-
ity of organic transistors as a function of time and tempera-
ture in a vacuum and in the dark.
We used polytriarylamine (PTAA) as a model compound.
This organic semiconducting polymer is amorphous and air
stable, with a highest occupied molecular orbital (HOMO)
energy level of about –5.1 eV (1 eV = 1.602 × 10
–19
J), and
yields reproducible transistors with a mobility of about
10
–3
–10
–2
cm
2
V
–1
s
–1
.
[5]
The chemical structure is depicted in
the insert of Figure 1, where X and Y are short chain alkyl
groups. The transistors were fabricated using heavily doped
p-type Si wafers as the common gate electrode with a 200 nm
thermally oxidized SiO
2
layer as the gate dielectric. Gold
source and drain electrodes were defined by using photoli-
thography with a channel width (W) and length (L)of
1000 lm and 10 lm, respectively. A 10 nm titanium layer was
used for adhesion. The SiO
2
layer was passivated with hexa-
methyldisilazane (HMDS) prior to semiconductor deposition.
PTAA films were spin-coated from toluene with a layer thick-
ness of 80 nm. To compare the reliability of PTAA transistors
with that of other organic semiconductors we investigated re-
gioregular poly(3-hexylthiophene) (P3HT) (Merck, UK),
poly(9,9′-dioctyl-fluorene-co-bithiophene) (F8T2) (American
Dye Source, Canada) and 3-butyl a-quinquethiophene
(3-BuT5) (Syncom B.V., The Netherlands) transistors. These
COMMUNICATION
Adv. Mater. 2007, 19, 2785–2789 © 2007 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim 2785
–
[*] Prof. D. M. de Leeuw, S. G. J. Mathijssen, Dr. M. Cölle,
E. C. P. Smits
Philips Research Laboratories
High Tech Campus 4
5656 AE Eindhoven (The Netherlands)
E-mail: dago.de.leeuw@philips.com
S. G. J. Mathijssen, Dr. P. A. Bobbert
Department of Applied Physics
Technische Universiteit Eindhoven
P.O. Box 513
5600 MB Eindhoven (The Netherlands)
Prof. H. Gomes
University of Algarve
Faculty of Sciences and Technology
Campus de Gambelas
8005-139 Faro (Portugal)
E. C. P. Smits
Dutch Polymer Institute (DPI)
P.O. Box 902
5600 AX Eindhoven (The Netherlands)
Dr. B. de Boer
Molecular Electronics, Material Science Centre
plus
University of Groningen, Nijenborgh 4
9747 AG Groningen (The Netherlands)
Dr. I. McCulloch
Merck Chemicals
University Parkway
Southampton SO16 7QD (UK)
[**] Dr. T. Anthopoulos, Imperial College, London, Dr. J. Veres, Kodak,
Rochester, USA, and Prof. P. Blom, University of Groningen, are
gratefully acknowledged for stimulating discussions. We also grate-
fully acknowledge the financial support received from the EC (project
PolyApply IST-IP-507143). The work of E.C.P.S. forms part of the
Dutch Polymer Institute (DPI) research program (project no. 516).
organic semiconductors provide a variety of morphologies;
from the polycrystalline film forming oligomer 3-BuT5 with
large grain sizes and pronounced grain boundaries, a highly
crystalline polymer P3HT with domains in the nanometer
scale, a liquid crystalline glassy copolymer F8T2, and an amor-
phous polymer PTAA. The materials also exhibit a range of
HOMO energy levels, from the electron rich, planar and
highly conjugated P3HT with a high lying HOMO, to the more
electron deficient, fluorene-containing F8T2 polymer. Films
were spin-coated from dichlorobenzene and chloroform. Elec-
trical-transport measurements were performed in high vacu-
um, 10
–5
mbar (1 bar = 100 000 Pa), in the dark, using a
HP 4155C semiconductor parameter analyzer. Prior to the
measurements the transistors were annealed for 2 h at 150 °C.
We first investigated the influence of the drain bias on the
stress behavior. The drain current of a PTAA transistor under
an applied gate bias, V
g
, of –20 V as a function of time is pre-
sented in Figure 1. The dashed line shows the drain current
using a continuous drain bias, V
d
, of –2 V. The current slowly
decreases with time. The measurement was performed in vac-
uum at 100 °C. After recovery of the transistor the measure-
ment was repeated, but for certain periods of time the drain
was grounded. The measured drain currents are presented in
Figure 1 as squares. Irrespective of the previous drain biasing,
the currents are identical. Hence, the gate-bias stress was
further investigated using a drain bias of 0 V.
Stress was measured as a function of time and temperature.
As a typical example, linear transfer curves are presented in
Figure 2a as a function of stress time. The applied gate bias
during stress was –20 V and the temperature was 140 °C. The
transfer curves were measured at a drain bias of –1 V by
sweeping the gate bias from 5 V to –35 V and back. No signifi-
cant hysteresis was observed. The transfer curves shift with
stress time in the direction of the applied gate bias; in Fig-
ure 2a to the left. Arrows indicate transfer curves measured
after 1 min up to 2 weeks. It shows that the magnitude of the
shift decreases exponentially with stress time. Figure 2a also
shows that the shape of the transfer curves hardly changes.
The transfer curves are parallel. The main effect of gate bias
stress is a shift of the threshold voltage, V
th
, which is empiri-
cally defined as the intercept of the extrapolated transfer
curve with the voltage axis.
We assume that the threshold-voltage shift is due to trapped
charges with surface density N
tr
. The threshold voltage shift,
DV
th
, is then given by DV
th
= eN
tr
/C
ox
where C
ox
is the capaci-
tance of the gate dielectric and e the elementary charge. In
other words, the trapped charges create an electric field that
has to be compensated by the gate bias before an accumula-
tion layer can be formed. The rate at which the charges are
trapped depends on the free-carrier density N
f
. For an expo-
nential distribution of trap states, characterized by a tempera-
ture T
0
, the trap rate is given by
[6–8]
dV
th
dt
/
dN
tr
dt
/ N
f
t
t
b1
s
b
(1)
where s is a characteristic time constant and the dispersion
parameter b equals T/T
0
. Solving Equation 1 with the bound-
COMMUNICATION
2786 www.advmat.de © 2007 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim Adv. Mater. 2007, 19, 2785–2789
0 1000 2000 3000 4000 5000
0
2
4
6
8
10
PTAAAu Au
SiO
2
Si
++
*
N
*
Y
n
X
PTAA
Current (10
-8
A)
Time (s)
Figure 1. Drain current of a PTAA field-effect transistor as a function of
time under an applied gate bias of –20 V. The temperature was 100 °C.
The dashed curve is measured using a continuous drain bias of –2 V. The
squares present the currents measured when the drain bias is temporari-
ly grounded. The insert shows the schematic cross section of the transis-
tor and the chemical structure of PTAA.
-30 -20 -10 0
0
50
100
150
a)
2 weeks
1 day
1 hour
1 min
Drain current (nA)
Gate Voltage (V)
10
1
10
2
10
3
10
4
10
5
10
6
0
5
10
15
20
b)
Threshold voltage shift ∆V
th
(V)
Time (s)
Figure 2. a) Linear transfer curves of PTAA transistors as a function of
stress time. The gate bias during stress was –20 V and the temperature
140 °C. The arrows indicate transfer curves measured after 1 min minute
up to 2 weeks. b) The threshold voltages obtained from Figure 2a pre-
sented as a function of time on a logarithmic scale. The fully drawn curve
is a fit with a stretched-exponential time dependence.
ary condition that the threshold voltage at infinite stress time
is equal to the applied gate bias, yields a stretched-exponen-
tial decay for the threshold voltage with time
DV
th
tV
0
1 exp
t
s
b
(2)
with V
0
=V
g
–V
th,0
, where V
th,0
is the threshold voltage at the
start of the experiment. The relaxation time s is thermally ac-
tivated as
s m
1
exp
E
a
k
B
T
(3)
where E
a
is the mean activation energy for trapping, and
where m is a frequency prefactor.
The threshold voltages are obtained from Figure 2a and
presented as a function of time on a logarithmic scale in Fig-
ure 2b. The threshold voltage saturates with time. The maxi-
mum shift is equal to the applied gate bias. The fully drawn
curve is a fit of the stretched exponential to the data. Perfect
agreement is obtained for a relaxation time s of 2 × 10
4
s and a
dispersion parameter b of 0.44, yielding a characteristic tem-
perature of the trap states, T
o
,of9×10
2
K. A similar agree-
ment was found for stress measurements at other tempera-
tures, and when using different values for the gate bias. We
note that at times smaller than the relaxation time, s, the
stretched exponential can be approximated by a power law.
This representation is used in the literature to analyze reliabil-
ity measurements on a time scale too short to observe satura-
tion.
[9]
Reliability measurements on a-Si transistors and MIS (met-
al–insulator–semiconductor) diodes show a small deviation
from a stretched exponential, especially close to saturation. A
better agreement is obtained using a stretched hyperbo-
la.
[6,10,11]
Mathematically the hyperbola is obtained when rais-
ing the trapped charge density, N
tr
, in Equation 1 to a certain
power a. The underlying physics is not well understood. For
our measurements, the introduction of a parameter a different
from unity does not improve the agreement and, therefore, is
disregarded.
To further investigate the trapping dynamics, stress mea-
surements on the PTAA transistors were performed at var-
ious temperatures. The threshold voltage shifts were fitted
with a stretched exponential. The characteristic relaxation
times, s, are presented as a function of reciprocal temperature
in Figure 3. A straight line is obtained showing that the re-
laxation time is thermally activated. The activation energy
was determined to be 0.6 eV and the frequency prefactor, m,
10
3
s
–1
. The insert of Figure 3 shows the values of the disper-
sion parameter, b, as a function of temperature. From the line-
ar dependence we re-obtain the characteristic temperature of
the trap states, T
o
,of9×10
2
K. For a-Si transistors, a modified
temperature dependence has been suggested. An additional
constant b
0
has been introduced by taking b equal to T/T
0
–b
0
.
This refinement is beyond the accuracy of our measurements.
Each data point in Figure 3 already required more than a
week of measuring time.
PTAA is an amorphous semiconductor. The transport is by
hopping, that is, phonon-assisted tunneling, of charge carriers
between localized states. The electrical transport of the PTAA
transistors in accumulation can be fitted by using an exponen-
tial density of transport states with a characteristic tempera-
ture of 450 K. This value is significantly lower than that deter-
mined for the trap states of 9 × 10
2
K. This implies that charge
transport states and trapping states have a different physical
origin. The trapping for instance could be dominated by the
interfaces. Therefore we varied both the thickness of the
PTAA semiconducting film and the passivation of the SiO
2
in-
terface. However, preliminary stress measurements did not
yet unambiguously allow identification of the trap states.
Similarly, there is no explanation yet for the values of the
activation energy and, especially, for the frequency prefactor.
The activation energy is related to the microscopic nature of
the trap site. The trap itself is unknown but a value of about
0.6 eV is not unrealistic. The value derived for m is about
10
3
Hz. It cannot be related to a simple phonon-mediated
escape-to-attempt frequency; in that case values of around
10
12
Hz would be expected.
[12]
We note however, that a
stretched-exponential decay, or Kohlrausch relaxation, fits
many relaxation processes in disordered electronic and molec-
ular systems.
[13]
It holds for all dispersive transport processes
in an exponential distribution of trap states. The prefactor can
vary by orders of magnitude. Here we use the prefactor only
to phenomenologically compare the reliability of organic
transistors.
Apart from PTAA we investigated the reliability of poly-
thienylenevinylene (PTV), P3HT, F8T2, 3-BuT5 field-effect
transistors as a function of gate bias, stress time, and tempera-
ture. The experimental threshold-voltage shifts were fitted
with a stretched exponential. Values derived for the prefactor
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2.4 2.6 2.8 3.0 3.2 3.4
10
4
10
5
10
6
10
7
10
8
300 350 400
0.30
0.35
0.40
0.45
τ (s)
1/T (1000 K
-1
)
T (K)
β
Figure 3. Relaxation times, s, as a function of reciprocal temperature.
The dashed line shows that the relaxation time is thermally activated with
an activation energy of 0.6 eV. The inset shows the corresponding disper-
sion parameters, b, as a function of temperature. From the linear depen-
dence, a characteristic temperature of the trap states of 9 × 10
2
K is ob-
tained.
m and the activation energy E
a
are presented in Table 1.
Reported literature data on sexithiophene (T6), copper-hexa-
decafluoro-phthalocyanine (FCuPc) and single-crystalline
pentacene are included as well. Our data, as well as the litera-
ture data, show that the threshold voltage shift of organic
transistors in accumulation is characterized by a common acti-
vation energy of around 0.6 eV. Differences in reliability are
mainly due to differences in the value for the prefactor, m.
All measurements were performed at a high vacuum of
10
–5
mbar. We observe that, in vacuum, a coverage of the
SiO
2
gate dielectric with HMDS ranging from 0 % to approxi-
mately 70 % does not influence the threshold-voltage shift.
However, the relaxation time in air decreases by an order of
magnitude with respect to the measured value in vacuum.
This indicates that the threshold voltage shift is due to residu-
al water. This interpretation is confirmed by reported stress
and temperature-dependent current measurements on organic
transistors deliberately exposed to water vapor.
[14,15,17]
Table 1
shows that differences in the reliability are due to the differ-
ence in the frequency prefactor that ranges from 10
3
s
–1
to
10
9
s
–1
.
To benchmark the reliability of organic transistors we have
included in Table 1 the typical frequency prefactor and activa-
tion energy for a-Si transistors. As a figure of merit we have
calculated the relaxation time, s, at room temperature. As
shown in Table 1, the relaxation time of PTAA transistors is
comparable to that of a-Si transistors. In the case of silicon-
based transistors the frequency prefactor, m, ranges from
10
6
s
–1
to 10
10
s
–1
depending on the silicon crystallinity. The ac-
tivation energy is constant. The higher stability for microcrys-
talline-based transistors results mainly from the fact that m is
more than three orders of magnitude lower.
[16]
Due to the
high activation energy of a-Si transistors, at higher tempera-
tures PTAA transistors are much more stable than their a-Si
counterparts. We note that the measurements were performed
in a vacuum in the dark. The numbers derived are device pa-
rameters and represent state-of-the-art intrinsic electrical re-
liability.
In practical applications such as integrated circuits and ac-
tive matrix displays, the transistor is only temporarily switched
on. The generated threshold-voltage shift relaxes in the off
state. Recovery of stress is therefore as important as stress in
accumulation. We investigated the recovery by grounding
both the drain and gate bias of stressed transistors and measur-
ing the transfer curves as a function of time and temperature.
The threshold-voltage shift in PTAA transistors is completely
reversible and follows a stretched-exponential time decay. The
relaxation times are presented in Figure 4 as a function of re-
ciprocal temperature. The frequency prefactor is 4 s
–1
and the
activation energy is 0.3 eV. The dispersion parameter as a
function of temperature is presented in the insert of Figure 4.
From the linear dependence we derive a characteristic temper-
ature of the trap states of 9 × 10
2
K, within experimental accu-
racy similar to the value derived from the stress measurements
in accumulation. This is expected when probing the same den-
sity of states. The activation energy and prefactor in accumula-
tion are different from those obtained in recovery. The differ-
ences are addressed by, for example, the defect-controlled
relaxation model proposed by Crandall.
[18]
Verification re-
quires measuring the activation energy in recovery as a func-
tion of stress time in accumulation.
Table 1 shows that for PTAA transistors at room tempera-
ture the relaxation times for stress and recovery are compar-
able. This is typical for organic transistors and completely
different from a-Si transistors where stress is orders of magni-
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Table 1. Activation energy, E
a
, frequency prefactor, m, and relaxation time
at room temperature for investigated organic transistors as well as for
amorphous and microcrystalline silicon transistors. Semiconductors
comprise PTAA, PTV, P3HT, F8T2, and 3-BuT5. The table contains both
our data as well as literature data. Values are presented for gate-bias
stress in accumulation and recovery.
Semiconductor m [Hz] E
a
[eV] s @ RT [s] Reference
STRESS PTAA 10
3
0.6 ± 0.1 1 10
7
This work
PTV 10
6
0.62 6 10
4
[17]
T6 10
5
0.52 10
4
[19]
FCuPc
–
0.51
–
[20]
Pentacene
(single crystal)
10
8
0.67 4 10
3
[21]
F8T2 – 0.52 1.5 10
4
Ea: [22]
s: This work
3-BuT5 10
7
0.6 ± 0.1 3 10
3
This work
P3HT 10
3
0.6 ± 0.1 4 10
7
This work
a-Si 10
9
0.98 8 10
7
[12]
lc-Si 10
6
1.07 10
12
[16]
RECOVERY PTAA 4 0.3 ± 0.1 1 10
7
This work
a-Si 10
13
1.1-1.5 510
9
[12]
2.4 2.6 2.8 3.0 3.2 3.4
10
4
10
5
10
6
10
7
10
8
300 325 350 375
0.30
0.35
0.40
0.45
τ (s)
1/T (1000 K
-1
)
β
T (K)
Figure 4. Recovery relaxation times as a function of reciprocal tempera-
ture. The stressed PTAA transistors were recovered by grounding both
gate and drain electrodes. The dashed line shows that the relaxation time
during recovery is thermally activated with an activation energy of 0.3 eV.
The inset shows the corresponding dispersion parameters as a function
of temperature. From the linear dependence a characteristic temperature
of the trap states of 9 × 10
2
K is obtained.