Journal ArticleDOI
Effect of deep-level impurities on the drain characteristics of short-channel metal-semiconductor field effect transistors
P Chattopadhyay,L Majumdar +1 more
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The role of deep-level impurities in the drain characteristics of a short-channel metal-semiconductor field effect transistor has been investigated in this paper, where the drain current of the device has been evaluated for different values of deep level density and at different temperatures ranging from 300 to 400 K.Abstract:
The role of deep-level impurities in the drain characteristics of a short-channel metal-semiconductor field effect transistor has been investigated. The drain current of the device has been evaluated for different values of deep-level density and at different temperatures ranging from 300 to 400 K. The presence of deep levels gives rise to an excess drain current resulting from the electronic excitations from the defect levels. The increase in the temperature enhances the current due to increasing ionization of the defects. An analytical expression for the channel conductance is also derived and it is found to be a function of deep-level concentration besides other nonidealities such as interface states and interfacial oxide layer. The effect of gate length shortening also reveals significant changes in the current and conductance.read more
Citations
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Journal ArticleDOI
The dc characteristics of a silicon-on-insulator metal-semiconductor field effect transistor
TL;DR: In this article, the authors investigated the dc characteristics of SOI MESFETs considering the energy distribution of interface states, fixed charges in the insulating layer and the effect of back gate bias.
Journal ArticleDOI
Numerical simulation of the response of substrate traps to a voltage applied to the gate of a gallium arsenide field effect transistor
TL;DR: In this paper, a numerical simulation of the response of substrate traps to a voltage applied to the gate of a gallium arsenide field effect transistor (GaAs FET) using proprietary simulation software is presented.
References
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Journal ArticleDOI
High-temperature electrical characteristics of GaAs MESFETs (25-400 degrees C)
F.S. Shoucair,P.K. Ojala +1 more
TL;DR: In this article, the effects of elevated ambient and substrate temperatures (25 degrees C up to 400 degrees C) on the electrical characteristics of integrated GaAs MESFETs in a state-of-theart commercial technology are reported.
Journal ArticleDOI
Two-dimensional simulations of drain-current transients in GaAs MESFET's with semi-insulating substrates compensated by deep levels
Kazushige Horio,Y. Fuseya +1 more
TL;DR: In this article, the drain-current transients of GaAs MESFETs with deep donors "EL2" in the semi-insulating substrate are simulated in the range t=10/sup -13/ to 10/sup 2/ s.
Journal ArticleDOI
Modeling temperature effects in the DC I-V characteristics of GaAs MESFET's
Luca Selmi,Bruno Ricco +1 more
TL;DR: In this article, a simple model is presented to account for the main temperature effects influencing the DC performance of GaAs MESFETs, based on a consistent solution of heat flow and current equations that accounts for nonuniform power dissipation within the device.
Journal ArticleDOI
Trapping-enhanced temperature variation of the threshold voltage of GaAs MESFET's
TL;DR: In this paper, the temperature variation of the threshold voltage in long-gate D-mode ion-implanted GaAs MESFET's (L_{gate} \approx 10 µm) is caused by the timedependent effect of traps in the active layer and, to a small extent, by the variation of channel-substrate interface depletion region with temperature.
Journal ArticleDOI
On the temperature variation of threshold voltage of GaAs MESFETs
TL;DR: In this paper, the authors investigated the temperature dependence of the threshold voltage of depletion-mode GaAs MESFETs with epitaxially grown n channels and proposed an approach to threshold shift analysis that allows direct comparison with threshold measurement.
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