Effect of sign-bit-flipping trojan on turbo coded communication systems
04 Jan 2019-pp 502-505
TL;DR: Simulations were carried out on a conventional iterative turbo decoder and the results point out that the Trojan affects the performance of the decoder at SNRs greater than -2 dB.
Abstract: In complex systems like 'Internet of Things' and 'Cyber Physical Systems', reliable communication is made possible by the use of error control codes like turbo codes. Such systems are vulnerable to attack by Trojans during the design or fabrication phases of IC manufacturing. This leads to a severe performance degradation of the entire system. This paper aims at analyzing the effect of a sign-bit-flipping Trojan on a turbo coded communication system. Simulations were carried out on a conventional iterative turbo decoder and the results point out that the Trojan affects the performance of the decoder at SNRs greater than -2 dB. This performance degradation is seen even with minimal activation of the Trojan and a finite error persists even at very high SNRs.
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TL;DR: In this paper, the authors leverage Symbolic Quick Error Detection (Symbolic QED or SQED), a recent bug detection and localization technique using Bounded Model Checking (BMC), and Symbolic starting states, to present a method that effectively detects both "difficult" logic bugs and hardware Trojans, even with long activation sequences where traditional BMC techniques fail.
Abstract: Existing techniques to ensure functional correctness and hardware trust during pre-silicon verification face severe limitations. In this work, we systematically leverage two key ideas: 1) Symbolic Quick Error Detection (Symbolic QED or SQED), a recent bug detection and localization technique using Bounded Model Checking (BMC); and 2) Symbolic starting states, to present a method that: i) Effectively detects both "difficult" logic bugs and Hardware Trojans, even with long activation sequences where traditional BMC techniques fail; and ii) Does not need skilled manual guidance for writing testbenches, writing design-specific assertions, or debugging spurious counter-examples. Using open-source RISC-V cores, we demonstrate the following: 1. Quick (<5 minutes for an in-order scalar core and <2.5 hours for an out-of-order superscalar core) detection of 100% of hundreds of logic bug and hardware Trojan scenarios from commercial chips and research literature, and 97.9% of "extremal" bugs (randomly-generated bugs requiring ~100,000 activation instructions taken from random test programs). 2. Quick (~1 minute) detection of several previously unknown bugs in open-source RISC-V designs.
References
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04 May 2008
TL;DR: A novel test generation technique is proposed that aims at magnifying the disparity between side-channel signal waveforms of tampered and genuine circuits to indicate the possibility of internal tampering.
Abstract: Testing the genuineness of a manufactured chip is an important step in an IC product life cycle. This becomes more prominent with the outsourcing of the manufacturing process, since the manufacturer may tamper the internal circuit behavior using Trojan circuits in the original design. Traditional testing methods cannot detect these stealthy Trojans because the triggering scenario, which activates it, is unknown. Recently, approaches based on side-channel analysis have shown promising results in detecting Trojans. In this paper, we propose a novel test generation technique that aims at magnifying the disparity between side-channel signal waveforms of tampered and genuine circuits to indicate the possibility of internal tampering. Experimental results indicate that our approach could magnify the likelihood of Trojans 4 to 20 times more than existing side-channel analysis based approaches.
86 citations
"Effect of sign-bit-flipping trojan ..." refers background in this paper
...Hardware Trojans are of different types and they can be categorized in to three main groups based on their action, physical and activation characteristics [2, 3, 6, 10, 12]....
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01 Jan 2017
TL;DR: The analysis of the reported techniques explores the major threat in the IC industries known as hardware Trojans and their countermeasures and clearly depicts the emerging trend in the hardware security with a direction indicating the future scope.
Abstract: Hardware security is an emerging topic in integrated-circuit (IC) industries. Research in the domain of the hardware security is at a full swing and many schemes to enhance the security are being explored. The hardware Trojan (HT) design and its various detection techniques to ensure the trust in design are the most sought for schemes. The analysis of the reported techniques explores the major threat in the IC industries known as hardware Trojans and their countermeasures. Moreover, it clearly depicts the emerging trend in the hardware security with a direction indicating the future scope.
19 citations
"Effect of sign-bit-flipping trojan ..." refers background in this paper
...Hardware Trojans are of different types and they can be categorized in to three main groups based on their action, physical and activation characteristics [2, 3, 6, 10, 12]....
[...]
TL;DR: This work presents a Triple Modular Redundancy (TMR) based methodology and shows that the detection of Trojans placed on predictable paths can be achieved through logic based testing methods and has shown that such implementation can be detected using side channel based testing.
10 citations
"Effect of sign-bit-flipping trojan ..." refers background in this paper
...Hence, the current focus in this field is towards Trojan neutralization apart from Trojan detection [5]....
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TL;DR: This paper forms a survey of recent developments on the various energy efficient error control coding techniques used in wireless communication and resource limited networks/hardware.
Abstract: Energy efficiency and error free transmission have become prime concerns in wireless communication in recent years. Such networks are much more affected by errors due to dynamic channel conditions than normal wired networks. Error control coding is commonly used in the entire range of information com-munication to reduce the harmful effects of the channel. In order to overcome the communication errors in an energy efficient way, an error control mechanism with less complexity is required. Energy efficient error control techniques to prolong network lifetime in resource limited network and wireless communication remains a challenge. This paper forms a survey of recent developments on the various energy efficient error control coding techniques used in wireless communication and resource limited networks/hardware.
10 citations
"Effect of sign-bit-flipping trojan ..." refers methods in this paper
...The use of interleavers randomizes the burst errors [11]....
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TL;DR: The emergence of a globalized, horizontal semiconductor business model raises concerns involving the security and trust of the information systems on which modern society is increasingly reliant for mission-critical functionality.
Abstract: The emergence of a globalized, horizontal semiconductor business model raises concerns involving the security and trust of the information systems on which modern society is increasingly reliant for mission-critical functionality. Traditionally, hardware-based security techniques and countermeasures modify hardware to prevent attacks and to protect IP blocks or secret keys. Some of the emerging types of attacks covered by this special issue are fundamentally different: the attacker is assumed to maliciously alter the design before or during fabrication.
8 citations