Efficiency Improvement of Silicon Solar Cells by Nitric Acid Oxidization
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Cites background from "Efficiency Improvement of Silicon S..."
...5 nm) oxide layer on both sides of the wafers followed by PECVD SiNx AR-coating layer deposition on both sides of the cells [13]....
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Cites background from "Efficiency Improvement of Silicon S..."
...It has previously been reported that a wet-chemically grownSiOx interlayer leads tohigher effectivecarrier lifetimes due to a significant reduction inDit,midgap [3, 5, 15]....
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Cites background from "Efficiency Improvement of Silicon S..."
...As shown via simulation in the subsequent section, the large positive Qtot for the SiNx passivation means a very low Dit,midgap is needed to achieve a low J0E, whereas the large negative Qtot of the Al2O3/SiNx passivation stack is less sensitive to variations in Dit,midgap....
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...It has previously been reported that a wet-chemically grown SiOx interlayer leads to higher effective carrier lifetimes due to a significant reduction in Dit,midgap.[56, 58, 59] Therefore, we can conclude that the higher lifetimes obtained for DIO3+HF+HCl→HF→DIO3 and HNO3→HF→HNO3 cleans is due to the chemical passivation exhibited by the 1-2 nm SiOx layer formed as a result of oxide-last step during wafer cleaning process....
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...[53, 54] Not only can DIO3 be used to form very clean Si surfaces, but DIO3 can be used to form very thin SiOx layers that further reduce surface recombination.[55-60]...
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...It has previously been reported that a wet-chemically grown SiOx interlayer leads to higher effective carrier lifetimes due to a significant reduction in Dit,midgap....
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References
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