Electrical and Reliability Characteristics of MOS Devices With Ultrathin $\hbox{SiO}_{2}$ Grown in Nitric Acid Solutions
TL;DR: In this article, the electrical and reliability properties of ultrathin silicon dioxide, grown by immersing silicon in nitric acid solution have been studied, and it is observed that the temperature, oxidation time, and concentration of the nitric acids solution play important roles in determining the thickness as well as the quality of the oxide.
Abstract: In this paper, electrical and reliability properties of ultrathin silicon dioxide, grown by immersing silicon in nitric acid solution have been studied. It is observed that the temperature, oxidation time, and concentration of the nitric acid solution play important roles in determining the thickness as well as the quality of the oxide. Prolonged exposure to nitric acid degrades the quality of the oxide. However, it was found necessary to reduce the oxidation temperature and the concentration of nitric acid to grow oxide of thickness 2 nm. In these conditions, the leakage current and fixed oxide charge in the chemical oxide were found to be too high. However, when this chemical oxidation was followed by anodic oxidation using ac bias, the electrical and reliability characteristics of metal-oxide-semiconductor (MOS) devices showed tremendous improvement. A MOSFETs with gate oxide grown by this technique have demonstrated low subthreshold slope, high transconductance and channel mobility. It is thus proposed that chemical oxidation followed by ac anodization can be a viable alternative low-temperature technique to grow thin oxides for MOS application.
Citations
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TL;DR: In this paper, the effect of post-deposition rapid thermal annealing (PDA) and post-metallization anneeling (PMA) on the structural and electrical characteristics of Pd/Al2O3/6H-SiC capacitors was investigated.
Abstract: Purpose
Al2O3 used as gate dielectric enables exploitation of higher electric field capacity of SiC, improving capacitive coupling and memory retention in flash memories. Passivation of traps at interface and in bulk which causes serious threat is necessary for better performance. The purpose of this paper is to investigate the effect of post-deposition rapid thermal annealing (PDA) and post-metallization annealing (PMA) on the structural and electrical characteristics of Pd/Al2O3/6H-SiC capacitors.
Design/methodology/approach
Al2O3 film is deposited by ALD; PDA is performed by rapid thermal annealing (RTA) in N2 at 900°C for 1 min and PMA in forming gas for 10 and 40 min. X-ray diffraction (XRD) and X-ray photoelectron spectroscopy (XPS) measurements data are studied in addition to capacitance-voltage (C-V) and current-voltage (I-V) characteristics for the fabricated Pd/Al2O3/SiC capacitors. Conduction mechanism contributing to the gate leakage current is extracted for the entire range of gate electric field.
Findings
RTA forms aluminum silicide at the interface causing an increase in the density of the interface states and gate leakage current for devices with an annealed film, when compared with an as-deposited film. One order improvement in leakage current has been observed for the devices with RTA, after subjecting to PMA for 40 min, compared with those devices for which PMA was carried out for 10 min. Whereas, no improvement in leakage current has been observed for the devices on as-deposited film, even after subjecting to PMA for 40 min. Conduction mechanisms contributing to gate leakage current are extracted for the investigated Al2O3/SiC capacitors and are found to be trapfilled limit process at low-field regions; trapassisted tunneling in the mid-field regions and Fowler–Nordheim (FN) tunneling are dominating in high-field regions.
Originality/value
The effect of PDA and PMA on the structural and electrical characteristics of Pd/Al2O3/SiC capacitors suitable for flash memory applications is investigated in this paper.
3 citations
TL;DR: In this article, high pressure chemical vapor oxidation of SiC in nitric acid vapor is reported and the growth rate is strongly dependent on temperature, and the thickness of the oxide increases almost linearly with time within the error limits.
Abstract: High pressure chemical vapor oxidation of SiC in nitric acid vapor is reported. Higher growth rate at temperatures as low as 400 to 500 °C has been achieved. The oxidation kinetics has been studied. It has been observed that the growth rate is strongly dependent on temperature, and the thickness of the oxide increases almost linearly with time within the error limits. X-ray photoelectron spectroscopy (XPS) measurement has been carried out to study the composition of the oxide. Room temperature electrical characterization (current–voltage and capacitance–voltage) has been carried out to estimate the oxide breakdown field strength, oxide charges, and interface state density. It is observed that prolonged oxidation or oxidation at higher temperature in acid ambient deteriorates the quality of oxide.
1 citations
01 Dec 2007
TL;DR: In this paper, an optoelectronic switch with both n and p-type delta-doped quantum wells was investigated, which formed potential wells for the carrier accumulation and potential barriers for the injection.
Abstract: An optoelectronic switch with both n- and p-type delta-doped (delta-doped) quantum wells was investigated. The delta-doped structures formed potential wells for the carrier accumulation and potential barriers for the carrier injection. Being possessed of delta-doped sheets with different doping levels, the potential barriers were sequentially collapsed to produce a double negative-differential-resistance (NDR) phenomenon in the current-voltage (I-V) characteristics of the device due to the carrier accumulation in the potential wells. The device also showed an optical function related to the barrier heights controllable by incident light.
Additional excerpts
...The quality of the chemical oxide can also be improved significantly by post-oxidation anodization as already shown by us [ 6 ]....
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01 Dec 2007
TL;DR: In this article, the authors used thermal oxidation, chemical oxidation and both followed by anodic oxidation to obtain significant improvement in interface states and reliability characteristics of MOS capacitors with ultrathin oxide grown by different techniques.
Abstract: MOS capacitors with ultrathin (cong1.2 nm) oxide grown by different techniques have been fabricated on Strained Si/Relaxed SiGe/n-Si substrates with linearly graded SiGe. These techniques involve thermal oxidation, chemical oxidation and both followed by anodic oxidation. Significant improvement in interface states has been obtained when oxidation was followed by anodic oxidation. The leakage currents and reliability characteristics have also shown great improvement. Band gap offsets extracted using a simple and novel technique are found to match well with expected values.
References
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01 Jan 1970
948 citations
TL;DR: In this paper, the leakage current of the SiO2 layer formed with 61 wt'% HNO3 at its boiling temperature of 113'°C has a 1.3 nm thickness with a considerably high density leakage current.
Abstract: Ultrathin silicon dioxide (SiO2) layers with excellent electrical characteristics can be formed using the nitric acid oxidation of Si (NAOS) method, i.e., by immersion of Si in nitric acid (HNO3) solutions. The SiO2 layer formed with 61 wt % HNO3 at its boiling temperature of 113 °C has a 1.3 nm thickness with a considerably high density leakage current. When the SiO2 layer is formed in 68 wt % HNO3 (i.e., azeotropic mixture with water), on the other hand, the leakage current density (e.g., 1.5 A/cm2 at the forward gate bias, VG, of 1 V) becomes as low as that of thermally grown SiO2 layers, in spite of the nearly identical SiO2 thickness of 1.4 nm. Due to the relatively low leakage current density of the NAOS oxide layer, capacitance–voltage (C–V) curves can be measured in spite of the ultrathin oxide thickness. However, a hump is present in the C–V curve, indicating the presence of high-density interface states. Fourier transformed infrared absorption measurements show that the atomic density of the SiO...
210 citations
"Electrical and Reliability Characte..." refers background in this paper
...oxidation [6]–[8], and chemical oxidation [9]–[16]....
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...[9] that chemical oxide formed by immersion of silicon in nitric acid contains the lowest interface density....
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TL;DR: In this article, the present understanding of wear-out and breakdown in ultrathin (t/sub ox/ < 5.0 nm) SiO/sub 2/ gate dielectric films and issues relating to reliability projection are reviewed.
Abstract: The present understanding of wear-out and breakdown in ultrathin (t/sub ox/ < 5.0 nm) SiO/sub 2/ gate dielectric films and issues relating to reliability projection are reviewed in this article. Recent evidence supporting a voltage-driven model for defect generation and breakdown, where energetic tunneling electrons induce defect generation and breakdown will be discussed. The concept of a critical number of defects required to cause breakdown and percolation theory will be used to describe the observed statistical failure distributions for ultrathin gate dielectric breakdown. Recent observations of a voltage dependent voltage acceleration parameter and non-Arrhenius temperature dependence will be presented. The current understanding of soft breakdown will be discussed and proposed techniques for detecting breakdown presented. Finally, the implications of soft breakdown on circuit functionality and the applicability of applying current reliability characterization and analysis techniques to project the reliability of future alternative gate dielectrics will be discussed.
153 citations
"Electrical and Reliability Characte..." refers background in this paper
...Also, the nonuniformity in the oxide thickness becomes comparable to the oxide thickness itself and consequently the oxide reliability becomes a serious concern for this ultrathin regime [2]....
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TL;DR: A review of the most common dielectric reliability measurement methods can be found in this paper, where a broad number of different measurement techniques are described in detail for which the set up of the measurement and its stress parameters are clarified.
Abstract: Reliability of thin dielectric films such as silicon dioxide grown on single crystalline silicon is of great importance for integrated circuits of present and future technologies. For the characterization of the quality of dielectric films, it is essential to have measurement methods available which can give a measure of dielectric reliability in a relatively short time. Stress biases are usually highly accelerated and cause destructive dielectric breakdown. Testing for dielectric reliability has been performed for more than 30 years, and in that time many different stress methods have been established. This article reviews that most common dielectric reliability measurement methods and gives practical guidelines to the reliability engineer in the field of dielectric characterization. The examples and data shown here are mainly from MOS gate oxides. The aim of this review paper is to emphasize advantages and disadvantages of the various stress methods. Appropriate dielectric stress methods are pointed out for applications such as process development, process characterization, pocess control and screening (burn-in). A broad number of different measurement techniques are described in detail for which the set up of the measurement and its stress parameters are clarified. Suitable dielectric test structures and the determination of the correct voltage and thickness of the dielectric are discussed; they are essential to determine the electric field across the thin film. The identification of dielectric breakdown and the interpretation and significance of the measurement results are reviewed. A good understanding of the stress method and the various measured parameters is essential to draw correct conclusions for the lifetime of the dielectric at operating conditions. The commonly used, basic analysis techniques for the measurement results are illustrated. Finally, the influence of stress-induced leakage currents on the dielectric reliability characterization is discussed and other aspects relating to very thin oxides of future technologies are briefly described. The paper also includes a large bibliography of more than 250 references.
92 citations
TL;DR: In this article, the amount of the energy shift of the substrate Si 2p3/2 peak measured as a function of the bias voltage was analyzed for 3.6-nm-thick silicon oxide/n-Si(100) metal-oxide-semiconductor devices.
Abstract: Interface states in the Si band gap present at oxide/Si(100) interfaces for ∼3‐nm‐thick Pt/2.1∼3.6‐nm‐thick silicon oxide/n‐Si(100) metal–oxide–semiconductor devices are investigated by measurements of x‐ray photoelectron spectra under biases between the Pt layer and the Si substrate, and their energy distribution is obtained by analyzing the amount of the energy shift of the substrate Si 2p3/2 peak measured as a function of the bias voltage. All the interface states observed using this new technique have discrete energy levels, showing that they are due to defect states. For the oxide layer formed in H2SO4+H2O2, the interface states have three density maxima at ∼0.3, ∼0.5, and ∼0.7 eV above the valence‐band maximum (VBM). For the oxide layer produced in HNO3, two density maxima appear at ∼0.3 and ∼0.7 eV above the VBM. The energy distribution for the oxide layer grown in HCl+H2O2 has one peak at ∼0.5 eV. The 0.5 eV interface state is attributed to the isolated Si dangling bond defect. The 0.3 and 0.7 eV ...
58 citations
"Electrical and Reliability Characte..." refers background in this paper
...The low interface density is partly attributed to passivation of silicon dangling bonds by protons in the HNO3 solution and partly due to a lesser amount of Si species near Si-SiO2 interfaces [11]....
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