Electroless plated nickel contacts to hydrogenated amorphous silicon
TL;DR: In this paper, the I-V characteristics of electroless plated-nickel phosphorus alloy (Ni) contacts to undoped amorphous silicon (a-Si:H) were compared with those of Nickel deposited by thermal evaporation.
Abstract: We report for the first time investigations on electroless plated-nickel phosphorus alloy (Ni) contacts to undoped amorphous silicon (a-Si:H). I–V characteristics of electroless NiP were compared with those of Nickel deposited by thermal evaporation. It was found that as-deposited NiP makes a rectifying contact to undoped a-Si:H. The effects of plasma annealing on the contacts were studied. NiP contacts on low pressure chemical vapour deposited a-Si are also reported here.
...read more
Citations
More filters
Patent•
05 Mar 2010
TL;DR: In this article, the amorphous silicon film is formed using silane gas diluted with hydrogen and crystallization is attained in the crystallization process even with the continuous formation of the base film through the polysilicon film in the single film forming chamber.
Abstract: At present, a forming process of a base film through an amorphous silicon film is conducted in respective film forming chambers in order to obtain satisfactory films. When continuous formation of the base film through the amorphous silicon film is performed in a single film forming chamber with the above film formation condition, crystallization is not sufficiently attained in a crystallization process. By forming the amorphous silicon film using silane gas diluted with hydrogen, crystallization is sufficiently attained in the crystallization process even with the continuous formation of the base film through the amorphous silicon film in the single film forming chamber.
185 citations
Patent•
16 Aug 2004
TL;DR: In this paper, the TFTs are fabricated using an active layer crystallized by making use of nickel, and the gate electrodes are comprising tantalum, and a heat treatment is performed to getter nickel element in the active layer and to drive it into the source/drain regions.
Abstract: There are disclosed TFTs that have excellent characteristics and can be fabricated with a high yield. The TFTs are fabricated, using an active layer crystallized by making use of nickel. Gate electrodes are comprising tantalum. Phosphorus is introduced into source/drain regions. Then, a heat treatment is performed to getter nickel element in the active layer and to drive it into the source/drain regions. At the same time, the source/drain regions can be annealed out. The gate electrodes of tantalum can withstand this heat treatment.
174 citations
Patent•
19 Jul 2010
TL;DR: In this article, the gate electrodes of the pixel TFT and the driver circuit TFT are formed from a first conductive layer, and gate electrodes are in electrical contact through connectors with gate wirings formed from the second conductive layers.
Abstract: The invention primarily provides gate electrodes and gate wirings permitting large-sized screens for active matrix-type display devices, wherein, in order to achieve this object, the construction of the invention is a semiconductor device having, on the same substrate, a pixel TFT provided in a display region and a driver circuit TFT provided around the display region, wherein the gate electrodes of the pixel TFT and the driver circuit TFT are formed from a first conductive layer, the gate electrodes are in electrical contact through connectors with gate wirings formed from a second conductive layer, and the connectors are provided outside the channel-forming regions of the pixel TFT and the driver circuit TFT.
52 citations
TL;DR: In this article, the adhesion and current-voltage characteristics of as-plated electroless nickel deposits on polished crystalline silicon activated using nickel and palladium were investigated. But, the results of the experiments were limited to a small number of simple experiments as a function of substrate doping polarity, doping level, plating area and plating duration.
Abstract: We present a study of the adhesion and current-voltage characteristics of as-plated electroless nickel deposits on polished crystalline silicon activated using nickel and palladium. A highlight of this study is the derivation of practically significant trends by collating the results of a large number of simple experiments as a function of substrate doping polarity, doping level, plating area, and plating duration. The study reveals that palladium activation is most effective on P + substrates while nickel activation is most effective on N + substrates, due to the requirement of substrate holes in the former activation and electrons in the latter. An activation process always improves adhesion, but, in some cases, degrades the electrical properties of the plating-silicon interface, because it introduces an intermediate silicide layer between nickel and silicon. Electroless nickel layer adheres better to nickel activated silicon, than to palladium activated silicon. However, the rectifying nature of the electroless nickel contacts on palladium activated silicon is superior to those on nickel activated silicon. Further, palladium silicide forms at 200°C, which is much lower than the temperature of 400°C required for nickel silicide formation.
21 citations
Patent•
09 Nov 2005
TL;DR: In this paper, the authors describe a semiconductor device which is nonvolatile, easily manufactured, and can be additionally written, which includes a plurality of transistors, a conductive layer which functions as a source wiring or a drain wiring of the transistors.
Abstract: The invention provides a semiconductor device which is non-volatile, easily manufactured, and can be additionally written A semiconductor device of the invention includes a plurality of transistors, a conductive layer which functions as a source wiring or a drain wiring of the transistors, and a memory element which overlaps one of the the plurality of transistors, and a conductive layer which functions as an antenna The memory element includes a first conductive layer, an organic compound layer and a phase change layer, and a second conductive layer stacked in this order The conductive layer which functions as an antenna and a conductive layer which functions as a source wiring or a drain wiring of the plurality of transistors are provided on the same layer
19 citations
References
More filters
143 citations
TL;DR: In this article, anomalous rectifying behavior has been observed in molybdenum/silicon Schottky barrier diodes produced by ion-beam sputter deposition of Mo on singlecrystal Si.
Abstract: Abnormal rectifying behavior has been observed in molybdenum/silicon Schottky barrier diodes produced by ion‐beam sputter deposition of Mo on single‐crystal Si. Rectifying, rather than ohmic contacts are obtained on p‐type Si, while ohmic behavior is seen on n‐type Si. These results are contrary to the usual results reported in the literature, and are shown to be caused by ion‐beam surface damage of Si. The damage does not simply cause a surface layer of high‐recombination velocity, but rather tends to bend the Si band edges downwards, irrespective of the Si conductivity type.
118 citations
TL;DR: In this article, a new algorithm is described for deriving the density of states N(E) from the Fermi energy EF upwards toward the conduction band edge, by implicitly accounting for the spatial variations of physical quantities across the thickness of the diode.
Abstract: A new algorithm is described for deriving the density of states N(E) from the Fermi energy EF upwards toward the conduction band edge. This refinement in the analysis of space‐charge‐limited currents (SCLC) enables the accurate determination of N(E) by implicitly accounting for the spatial variations of physical quantities across the thickness of the diode. SCLC is measured in NiCr/n+/a‐Si1−xGex: H/Pt diode structures. For a‐Si:H samples, SCLC values for N(EF) are compared to those derived from admittance measurements on the same diodes. The two determinations agree in samples where 1016
84 citations
TL;DR: In this article, an electroless Ni plating of Si wafers with p-n junctions using conventional solutions was performed and a pronounced difference in plating rate between p and n-type surfaces was observed.
Abstract: In the study of electroless Ni plating of Si wafers with p‐n junctions using conventional solutions, a pronounced difference in plating rate between p‐ and n‐type surfaces is observed. Further experiments show that rate difference probably should not only be attributed to the photovoltaic effect generated at the p‐n junctions but also to the electronegativity difference between p‐ and n‐type Si. The latter effect can be changed by addition of such material as or to the plating solution. Whereas addition increases the rate difference, EDTA addition decreases it. This fact which can be put to practical use gives an extra support for the explanation given above.
35 citations
TL;DR: In this article, high field conduction in n+nn+ amorphous hydrogenated silicon (α•Si:H) films has been investigated at different temperatures, and the results can be explained by assuming space charge limited conduction (SCLC) with a uniform density of traps.
Abstract: High field conduction in n+nn+ amorphous hydrogenated silicon (α‐Si:H) films has been investigated at different temperatures. The results can be explained by assuming space‐charge limited conduction (SCLC) with a uniform density of traps. The value of density of states at the Fermi level, g(EF), obtained from the SCLC measurements ranges between 7−9×1016 cm−3 eV−1. Similar values are obtained by measurements of field effect and frequency and temperature dependence of Schottky barrier capacitance on material grown under identical conditions.
29 citations
Related Papers (5)
[...]
08 Mar 1994