Electromagnetic interference (EMI) of system-on-package (SOP)
TL;DR: In this paper, the authors discuss the design and development of system-on-package (SOP) integrated high-performance digital LSIs and for radio frequency (RF) and analog circuits.
Abstract: Electromagnetic interference (EMI) issues are expected to be crucial for next-generation system-on-package (SOP) integrated high-performance digital LSIs and for radio frequency (RF) and analog circuits. Ordinarily in SOPs, high-performance digital LSIs are sources of EMI, while RF and analog circuits are affected by EMI (victims). This paper describes the following aspects of EMI in SOPs: 1) die/package-level EMI; 2) substrate-level EMI; 3) electromagnetic modeling and simulation; and 4) near electromagnetic field measurement. First, LSI designs are discussed with regard to radiated emission. The signal-return path loop and switching current in the power/ground line are inherent sources of EMI. The EMI of substrate, which work as coupling paths or unwanted antennas, is described. Maintaining the return current path is an important aspect of substrate design for suppressing EMI and for maintaining signal integrity (SI). In addition, isolating and suppressing the resonance of the DC power bus in a substrate is another important design aspect for EMI and for power integrity (PI). Various electromagnetic simulation methodologies are introduced as indispensable design tools for achieving high-performance SOPs without EMI problems. Measurement techniques for near electric and magnetic fields are explained, as they are necessary to confirm the appropriateness of designs and to investigate the causes of EMI problems. This paper is expected to be useful in the design and development of SOPs that take EMI into consideration.
Citations
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TL;DR: In this article, the authors reviewed possible solutions based on decoupling or isolation for suppressing power distribution network (PDN) noise on package or printed circuit board (PCB) levels.
Abstract: Mitigating power distribution network (PDN) noise is one of the main efforts for power integrity (PI) design in high-speed or mixed-signal circuits. Possible solutions, which are based on decoupling or isolation concept, for suppressing PDN noise on package or printed circuit board (PCB) levels are reviewed in this paper. Keeping the PDN impedance very low in a wide frequency range, except at dc, by employing a shunt capacitors, which can be in-chip, package, or PCB levels, is the first priority way for PI design. The decoupling techniques including the planes structure, surface-mounted technology decoupling capacitors, and embedded capacitors will be discussed. The isolation approach that keeps part of the PDN at high impedance is another way to reduce the PDN noise propagation. Besides the typical isolation approaches such as the etched slots and filter, the new isolation concept using electromagnetic bandgap structures will also be discussed.
200 citations
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TL;DR: The fundamentals and latest progress of modeling, analysis, and design technologies for signal integrity and electromagnetic compatibility on PCB and package in the past decades are reviewed and the necessity of practical training of designers is mentioned.
Abstract: This paper reviews the fundamentals and latest progress of modeling, analysis, and design technologies for signal integrity and electromagnetic compatibility on PCB and package in the past decades. Most results in this field are based on the very rich and highly educational literature produced by Prof. C. Paul in his long scientific career. The inclusion of parameters variability effects is also considered, and it is demonstrated how statistical simulations can become affordable by means of recently-introduced stochastic methods. Finally, the necessity of practical training of designers is mentioned, and an experience relying on realistic PCB demonstrators is illustrated.
166 citations
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TL;DR: In this article, a power/ground (P/G) TSV array model based on separated P/G TSV and chip-PDN models at frequencies up to 20 GHz is proposed for estimating the PDN impedances of 3D TSV ICs.
Abstract: The impedance of a power-distribution network (PDN) in three-dimensionally stacked chips with multiple through-silicon-via (TSV) connections (a 3D TSV IC) was modeled and analyzed using a power/ground (P/G) TSV array model based on separated P/G TSV and chip-PDN models at frequencies up to 20 GHz. The proposed modeling and analysis methods for the P/G TSV and chip-PDN are fundamental for estimating the PDN impedances of 3D TSV ICs because they are composed of several chip-PDNs and several thousands of P/G TSV connections. Using the proposed P/G TSV array model, we obtained very efficient analyses and estimations of 3D TSV IC PDNs, including the effects of TSV inductance and multiple-TSV inductance, depending on P/G TSV arrangement and the number of stacked chip-PDNs of a 3D TSV IC PDN. Inductances related to TSVs, combined with chip-PDN inductance and capacitance, created high upper peaks of PDN impedance, near 1 GHz. Additionally, the P/G TSV array produced various TSV array inductance effects on stacked chip-PDN impedance, according to their arrangement, and induced high PDN impedance, over 10 GHz.
126 citations
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TL;DR: The most common and most efficient known spreading techniques are considered, looking for spreading parameters that ensure the highest EMI reduction and the lowest performance reduction in the circuit where the spreading is applied.
Abstract: Spread spectrum is a technique introduced for mitigating electromagnetic interference (EMI) problems in many class of circuits. In this paper, with particular emphasis on switching DC/DC converters, we consider the most common and most efficient known spreading techniques, looking for spreading parameters that ensure the highest EMI reduction and the lowest performance reduction in the circuit where the spreading is applied. The result is an interesting tradeoff not only between EMI reduction and performance drop, but also on the EMI reduction itself when considering different EMI victim models. The proposed analysis is supported by measurements on two switching DC/DC converters: 1) based on pulse-width modulation and 2) based on the resonant converter class.
115 citations
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TL;DR: This study open new avenues to design flexible and lightweight electromagnetic interference shielding materials by careful selection of functional nanoparticles in poly(vinylidene fluoride) (PVDF)-based composites.
Abstract: Two unique materials were developed, like graphene oxide (GO) sheets covalently grafted on to barium titanate (BT) nanoparticles and cobalt nanowires (Co-NWs), to attenuate the electromagnetic (EM) radiations in poly(vinylidene fluoride) (PVDF)-based composites. The rationale behind using either a ferroelectric or a ferromagnetic material in combination with intrinsically conducting nanoparticles (multiwall carbon nanotubes, CNTs), is to induce both electrical and magnetic dipoles in the system. Two key properties, namely, enhanced dielectric constant and magnetic permeability, were determined. PVDF/BT–GO composites exhibited higher dielectric constant compared to PVDF/BT and PVDF/GO composites. Co-NWs, which were synthesized by electrodeposition, exhibited saturation magnetization (Ms) of 40 emu/g and coercivity (Hc) of 300 G. Three phase hybrid composites were prepared by mixing CNTs with either BT–GO or Co-NWs in PVDF by solution blending. These nanoparticles showed high electrical conductivity and sig...
90 citations
References
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TL;DR: Numerical experiments and numerical comparisons show that the PML technique works better than the others in all cases; using it allows to obtain a higher accuracy in some problems and a release of computational requirements in some others.
9,875 citations
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05 Apr 2022
TL;DR: In this paper, the authors present the Phasor Solution Method for calculating per-unit-length parameters and Crosstalk of multiconductor transmission lines for EMC systems.
Abstract: Preface. 1. Introduction to Electromagnetic Compatibility (EMC). 2. EMC Requirements for Electronic Systems. 3. Signal Spectra-The Relationship Between theTime Domain and the Frequency Domain. 4. Transmission Lines and Signal Integrity. 5. Nonideal Behavior of Components. 6. Conducted Emissions and Susceptibility. 7. Antennas. 8. Radiated Emissions and Susceptibility. 9. Crosstalk. 10. Shielding. 11. System Design for EMC. Appendix A: The Phasor Solution Method. Appendix B: The Electromagnetic Field Equations and Waves. Appendix C: Computer Codes for Calculating the Per-Unit-Length Parameters and Crosstalk of Multiconductor Transmission Lines. Appendix D: Spice (PSPICE) Tutorial. Index.
2,064 citations
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01 Jan 1998
TL;DR: A survey of the Finite-Difference Time Domain literature can be found in this article, where the authors present a set of techniques for time-domain analysis using multiresolution expansions.
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551 citations
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TL;DR: In this article, the authors describe a strategy to characterize power and groundplane structures using a full cavity-mode frequency-domain resonator model, and introduce a novel technique to suppress modal impedances, minimizing both transfer and input impedances.
Abstract: In this paper, we describe a strategy to characterize power and ground-plane structures using a full cavity-mode frequency-domain resonator model. We develop insights into modal analysis and introduce a novel technique to suppress modal impedances, minimizing both transfer and input impedances. The influence of port locations on the Z matrix is evaluated.
305 citations
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TL;DR: In this article, a decoupling strategy for multilayer boards must account for the low inductance and relatively high capacitance of the power bus, which is not appropriate for one-sided or two-sided printed circuit boards.
Abstract: Guidelines for the selection and placement of decoupling capacitors that work well for one-sided or two-sided printed circuit boards are not appropriate for multilayer boards with power and ground planes. Boards without internal planes take advantage of the power bus inductance to help decouple components at the higher frequencies. An effective decoupling strategy for multilayer boards must account for the low inductance and relatively high capacitance of the power bus. >
200 citations