Proceedings ArticleDOI
Extension of EMPSIJ for Estimating the Impact of Substrate Noise on Jitter in a CMOS Inverter
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TLDR
In this article, the authors present an analysis of jitter in a CMOS inverter due to power supply, ground bounce and substrate noise, and the results match reasonably well with mean percentage error (MPE) not exceeding 10%.Abstract:
This paper presents an analysis of jitter in a CMOS inverter due to power supply, ground bounce and substrate noise. The analysis is based on the recently introduced method EMPSIJ [1] which is extended in this paper for substrate noise induced jitter. To estimate jitter due to various noise sources (such as supply noise, ground bounce, substrate noise), noise transfer functions are derived. The results of EMPSIJ and the EDA simulations are compared for an inverter designed in a 28nm CMOS Technology of TSMC. For multiple test cases, the results match reasonably well with mean percentage error (MPE) not exceeding 10%.read more
Citations
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Journal ArticleDOI
A Review on Power Supply Induced Jitter
TL;DR: The primary focus of this paper is to discuss the modeling of jitter caused by power supply noise (PSN), named power supply induced jitter (PSIJ).
Proceedings ArticleDOI
Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator
Vijender Kumar Sharma,B. Dinesh Kumar,Muhammed Suhail Illikkal,Jai Narayan Tripathi,Navneet Gupta,Hitesh Shrimali +5 more
TL;DR: The closed-form transfer function of the comparator including biasing circuitry, used in PSIJ analysis, is derived using symbolic admittance method and the mathematical model shows an agreement with the simulation and exhibits 7.4% of mean percentage error (MPE).
References
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Journal ArticleDOI
A Review on Power Supply Induced Jitter
TL;DR: The primary focus of this paper is to discuss the modeling of jitter caused by power supply noise (PSN), named power supply induced jitter (PSIJ).
Journal ArticleDOI
Analytical Transfer Functions Relating Power and Ground Voltage Fluctuations to Jitter at a Single-Ended Full-Swing Buffer
TL;DR: The transfer functions relating supply voltage fluctuations to jitter are analytically derived in closed form expressions for a single-ended buffer from a linear differential equation obtained from asymptotic linear inverter I-V curves.
Proceedings ArticleDOI
Investigating the Impact of Supply Noise on the Jitter in Gigabit I/O Interfaces
TL;DR: In this article, a detailed analysis of supply noise induced jitter in a high-speed interface is presented, where the sensitivity of the interface circuits to noise is measured as a function of noise frequency.
Journal ArticleDOI
Propagation Delay-Based Expression of Power Supply-Induced Jitter Sensitivity for CMOS Buffer Chain
Xin Jie Wang,Tad Kwasniewski +1 more
TL;DR: This paper demonstrates a very simple and highly accurate expression of power supply-induced jitter sensitivity transfer function for CMOS buffer chain.
Journal ArticleDOI
Analytical Probability Density Calculation for Step Pulse Response of a Single-Ended Buffer With Arbitrary Power-Supply Voltage Fluctuations
TL;DR: An analytical methodology to calculate the probability density functions (PDFs) for the step pulse response of a single-ended buffer with arbitrary power-supply voltage fluctuations is proposed and validated by comparisons with HSPICE and experimental results.