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Journal ArticleDOI

Forensic imaging of embedded systems using JTAG (boundary-scan)

Ing. M. F. Breeuwsma
- 01 Mar 2006 - 
- Vol. 3, Iss: 1, pp 32-42
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TLDR
This paper describes how to use JTAG (JTAG: Joint Test Action Group, also called boundary-scan) for producing a forensic image (image: an one-on-one copy of data found on an exhibit) of an embedded system.
About
This article is published in Digital Investigation.The article was published on 2006-03-01. It has received 107 citations till now. The article focuses on the topics: Spy-Bi-Wire & Boundary scan description language.

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Citations
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Journal ArticleDOI

The Cybersecurity Landscape in Industrial Control Systems

TL;DR: The ICS cybersecurity landscape is explored including the key principles and unique aspects of ICS operation, a brief history of cyberattacks on ICS, an overview of I CS security assessment, and a survey of “uniquely-ICS” testbeds that capture the interactions between the various layers of an ICS.

Forensic Data Recovery from Flash Memory

TL;DR: A low level approach for the forensic examination of flash memories is suggested and three low-level data acquisition methods for making full memory copies of flash memory devices are described.
ReportDOI

Guidelines on Cell Phone Forensics

TL;DR: This work states that certain commercial entities, equipment, or materials may be identified in this document in order to describe an experimental procedure or concept adequately and not necessarily the best available for the purpose.
Journal ArticleDOI

Firmware modification attacks on programmable logic controllers

TL;DR: This paper examines the vulnerability of PLCs to intentional firmware modifications in order to obtain a better understanding of the threats posed by PLC firmware modification attacks and the feasibility of these attacks.
ReportDOI

Guidelines on Mobile Device Forensics

TL;DR: This guide attempts to bridge the gap by providing an indepth look into mobile devices and explaining technologies involved and their relationship to forensic procedures.
References
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Book

The Test Access Port and Boundary Scan Architecture

TL;DR: In this article, a wheel decorating ornament comprising an annular, planar sheet of material decorated on opposite sides, axially disposed between the groups of spokes and radially disposed at the rim and the hub, is presented.
Book

ARM Architecture Reference Manual

David Seal
TL;DR: This is the authoritative reference guide to the ARM RISC architecture and contains detailed information about all versions of the ARM and Thumb instruction sets, the memory management and cache functions, as well as optimized code examples.