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Fundamentals of Microsystems Packaging
01 Jan 2001-
TL;DR: This chapter discussesfundamentals of Microsystems Design for the Environment, as well as the role of Packaging in Microelectronics, and how to design for Reliability.
Abstract: Chapter 1: Introduction to Microsystems Packaging. Chapter 2: The Role of Packaging in Microelectronics Chapter 3: The Role of Packaging in Microsystems. Chapter 4: Fundamentals of Electrical Package Design. Chapter 5: Fundamentals of Design for Reliability. Chapter 6: Fundamentals of Thermal Management. Chapter 7: Fundamentals of Single Chip Packaging. Chapter 8: Funamentals of Multichip Packaging. Chapter 9: Fundamentals of IC Assembly. Chapter 10: Fundamentals of Water-Level Packaging. Chapter 11: Fundamentals of Passives: Discrete, Integrated, and Embedded. Chapter 12: Fundamentals of Optoelectronics. Chapter 13: Fundamentals of RF Packaging. Chapter 14: Fundamentals of Microelectromechanical Systems. Chapter 15: Fundamentals of Sealing and Encapsulation. Chapter 16: Fundamentals of System-Level PWB Technologies. Chapter 17: Fundamentals of Board Assembly. Chapter 18: Fundamentals of Packaging Materials and Processes. Chapter 19: Fundamentals of Electrical Testing. Chapter 20: Fundamentals of Package Manufacturing. Chapter 21: Fundamentals of Microsystems Design for the Environment. Chapter 22: Fundamentals of Microsstems Reliability. Glossary.
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TL;DR: In this paper, the authors focus on the important role and challenges of high-k polymer-matrix composites (PMC) in new technologies and discuss potential applications of highk PMC.
1,412 citations
TL;DR: In this article, the authors discuss the materials, applications and recent advances of electrically conductive adhesives as an environmental friendly solder replacement in the electronic packaging industry, and discuss the potential of ECAs to replace tin-lead metal solders in all applications.
Abstract: Tin–lead solder alloys are widely used in the electronic industry. They serve as interconnects that provide the conductive path required to achieve connection from one circuit element to another. There are increasing concerns with the use of tin–lead alloy solders in recognition of hazards of using lead. Lead-free solders and electrically conductive adhesives (ECAs) have been considered as the most promising alternatives of tin-lead solder. ECAs consist of a polymeric resin (such as, an epoxy, a silicone, or a polyimide) that provides physical and mechanical properties such as adhesion, mechanical strength, impact strength, and a metal filler (such as, silver, gold, nickel or copper) that conducts electricity. ECAs offer numerous advantages over conventional solder technology, such as environmental friendliness, mild processing conditions (enabling the use of heat-sensitive and low-cost components and substrates), fewer processing steps (reducing processing cost), low stress on the substrates, and fine pitch interconnect capability (enabling the miniaturization of electronic devices). Therefore, conductive adhesives have been used in liquid crystal display (LCD) and smart card applications as an interconnect material and in flip–chip assembly, chip scale package (CSP) and ball grid array (BGA) applications in replacement of solder. However, no currently commercialized ECAs can replace tin–lead metal solders in all applications due to some challenging issues such as lower electrical conductivity, conductivity fatigue (decreased conductivity at elevated temperature and humidity aging or normal use condition) in reliability testing, limited current-carrying capability, and poor impact strength. Considerable research has been conducted recently to study and optimize the performance of ECAs, such as electrical, mechanical and thermal behaviors improvement as well as reliability enhancement under various conditions. This review article will discuss the materials, applications and recent advances of electrically conductive adhesives as an environmental friendly solder replacement in the electronic packaging industry.
640 citations
IBM1
TL;DR: 3D technology from IBM is highlighted, including demonstration test vehicles used to develop ground rules, collect data, and evaluate reliability, and examples of 3D emerging industry product applications that could create marketable systems are provided.
Abstract: Three-dimensional (3D) silicon integration of active devices with through-silicon vias (TSVs), thinned silicon, and silicon-to-silicon fine-pitch interconnections offers many product benefits. Advantages of these emerging 3D silicon integration technologies can include the following: power efficiency, performance enhancements, significant product miniaturization, cost reduction, and modular design for improved time to market. IBM research activities are aimed at providing design rules, structures, and processes that make 3D technology manufacturable for chips used in actual products on the basis of data from test-vehicle (i.e., prototype) design, fabrication, and characterization demonstrations. Three-dimensional integration can be applied to a wide range of interconnection densities (<10/cm2 to 108/cm2), requiring new architectures for product optimization and multiple options for fabrication. Demonstration test structures, which are designed, fabricated, and characterized, are used to generate experimental data, establish models and design guidelines, and help define processes for future product consideration. This paper 1) reviews technology integration from a historical perspective, 2) describes industry-wide progress in 3D technology with examples of TSV and silicon-silicon interconnection advancement over the last 10 years, 3) highlights 3D technology from IBM, including demonstration test vehicles used to develop ground rules, collect data, and evaluate reliability, and 4) provides examples of 3D emerging industry product applications that could create marketable systems.
461 citations
TL;DR: In this paper, an experimental study was conducted on the cooling of mobile electronic devices, such as personal digital assistants (PDAs) and wearable computers, using a heat storage unit (HSU) filled with the phase change material (PCM) of n-eicosane inside the device.
313 citations
TL;DR: In this article, the authors provide an overview on the design of power distribution networks for digital and mixed-signal systems with emphasis on design tools, decoupling, measurements, and emerging technologies.
Abstract: The power consumption of microprocessors is increasing at an alarming rate leading to 2X reduction in the power distribution impedance for every product generation. In the last decade, high I/O ball grid array (BGA) packages have replaced quad flat pack (QFP) packages for lowering the inductance. Similarly, multilayered printed circuit boards loaded with decoupling capacitors are being used to meet the target impedance. With the trend toward system-on-package (SOP) architectures, the power distribution needs can only increase, further reducing the target impedance and increasing the isolation characteristics required. This paper provides an overview on the design of power distribution networks for digital and mixed-signal systems with emphasis on design tools, decoupling, measurements, and emerging technologies.
259 citations
Cites background from "Fundamentals of Microsystems Packag..."
...Today, the core power supply inductance has been reduced to pH for high-performance computer products using state of the art packages and boards [1]....
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