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Fundamentals of Solid State Electronics

01 Oct 1991-
TL;DR: In this article, a homogeneous semiconductor at equilibrium drift, diffusion, generation, recombination, trapping and tunneling metaloxide-semiconductor capacitor P/N and other junction diodes metal-oxide semiconductor and other field effect transistors bipolar junction transistor and other bipolar transistor devices.
Abstract: Electrons, bonds, bands and holes homogeneous semiconductor at equilibrium drift, diffusion, generation, recombination, trapping and tunneling metal-oxide-semiconductor capacitor P/N and other junction diodes metal-oxide-semiconductor and other field-effect transistors bipolar junction transistor and other bipolar transistor devices.
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Yuan Taur1, Tak H. Ning1
01 Jan 2016
TL;DR: In this article, the authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices.
Abstract: Learn the basic properties and designs of modern VLSI devices, as well as the factors affecting performance, with this thoroughly updated second edition. The first edition has been widely adopted as a standard textbook in microelectronics in many major US universities and worldwide. The internationally-renowned authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices. Equations and parameters provided are checked continuously against the reality of silicon data, making the book equally useful in practical transistor design and in the classroom. Every chapter has been updated to include the latest developments, such as MOSFET scale length theory, high-field transport model, and SiGe-base bipolar devices.

2,680 citations

Journal ArticleDOI
TL;DR: The main contribution of this work is the simplification of the current equation, in which only four parameters are required, compared to six or more in the previously developed two-diode models.

571 citations

Journal ArticleDOI
01 Apr 1997
TL;DR: An overview of research developments toward nanometer-scale electronic switching devices for use in building ultra-densely integrated electronic computers and two classes of alternatives to the field-effect transistor are considered: quantum-effect and single-electron solid-state devices and molecular electronic devices.
Abstract: This paper provides an overview of research developments toward nanometer-scale electronic switching devices for use in building ultra-densely integrated electronic computers. Specifically, two classes of alternatives to the field-effect transistor are considered: (1) quantum-effect and single-electron solid-state devices and (2) molecular electronic devices. A taxonomy of devices in each class is provided, operational principles are described and compared for the various types of devices, and the literature about each is surveyed. This information is presented in nonmathematical terms intended for a general, technically interested readership.

377 citations


Cites background from "Fundamentals of Solid State Electro..."

  • ...Exciting theoretical and experimental progress toward these goals is just beginning....

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01 Jan 1998
TL;DR: In this paper, the authors quantified key scaling limits for MOS transistors and showed that traditional SiO2 gate dielectrics will reach fundamental leakage limits, due to tunneling, for an effective electrical thickness below 2.3 nm.
Abstract: Conventional scaling of gate oxide thickness, source/drain extension (SDE), junction depths, and gate lengths have enabled MOS gate dimensions to be reduced from 10μm in the 1970’s to a present day size of 0.1μm. To enable transistor scaling into the 21 century, new solutions such as high dielectric constant materials for gate insulation and shallow, ultra low resistivity junctions need to be developed. In this paper, for the first time, key scaling limits are quantified for MOS transistors (see Table 1). We show that traditional SiO2 gate dielectrics will reach fundamental leakage limits, due to tunneling, for an effective electrical thickness below 2.3 nm. Experimental data and simulations are used to show that although conventional scaling of junction depths is still possible, increased resistance for junction depths below 30 nm results in performance degradation. Because of these limits, it will not be possible to further improve short channel effects. This will result in either unacceptable off-state leakage currents or strongly degraded device performance for gate lengths below 0.10μm. MOS transistor limits will be reached for 0.13μm process technologies in production during 2002. Because of these problems, new solutions will need to be developed for continued transistor scaling. We discuss some of the proposed solutions including high dielectric constant gate materials and alternate device architectures.

329 citations

Journal ArticleDOI
TL;DR: The Towards Oxide-Based Electronics (TO-BE) Action as mentioned in this paper has been recently running in Europe and has involved as participants several hundred scientists from 29 EU countries in a wide four-year project.

251 citations


Cites background from "Fundamentals of Solid State Electro..."

  • ...The OFF state is deter-mined by the sub-threshold drain leakage current [395]:...

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