Fuzzy fairness controller for NVMe SSDs

Abstract: SSDs are now increasingly being adopted as primary nonvolatile storage in diverse domains. The internal caches in the SSDs boost SSD performance, lifetime, and robustness. There are three types of internal caches: data cache and mapping cache in the SSD front-end, and flash-based cache in the SSD back-end; they are designed to meet specific requirements like controlling traffic to the back-end, optimization of response time, improving SSD lifetime etc. The underlying memory technology also influences cache design decisions. This work aims to present a methodological survey of cache management policies for these three types of internal caches in SSD. In particular, our work (a) makes a taxonomical classification of cache management policies for each of the cache types and performs a comparative analysis of the research works in each micro-category, (b) derives a set of guidelines that can be helpful for a future cache designer, and (c) enumerates a number of future research directions for designing an optimal SSD internal cache management policy. Our work is distinct from other studies in that we analyze policies for all three types of SSD internal caches, whereas this has not been done in the prior surveys.

Abstract: (NOTE: Each chapter concludes with Exercises.) I: PRELIMINARIES. 1. Introduction. Rule-Based FLSs. A New Direction for FLSs. New Concepts and Their Historical Background. Fundamental Design Requirement. The Flow of Uncertainties. Existing Literature on Type-2 Fuzzy Sets. Coverage. Applicability Outside of Rule-Based FLSs. Computation. Supplementary Material: Short Primers on Fuzzy Sets and Fuzzy Logic. Primer on Fuzzy Sets. Primer on FL. Remarks. 2. Sources of Uncertainty. Uncertainties in a FLS. Words Mean Different Things to Different People. 3. Membership Functions and Uncertainty. Introduction. Type-1 Membership Functions. Type-2 Membership Functions. Returning to Linguistic Labels. Multivariable Membership Functions. Computation. 4. Case Studies. Introduction. Forecasting of Time-Series. Knowledge Mining Using Surveys. II: TYPE-1 FUZZY LOGIC SYSTEMS. 5. Singleton Type-1 Fuzzy Logic Systems: No Uncertainties. Introduction. Rules. Fuzzy Inference Engine. Fuzzification and Its Effect on Inference. Defuzzification. Possibilities. Fuzzy Basis Functions. FLSs Are Universal Approximators. Designing FLSs. Case Study: Forecasting of Time-Series. Case Study: Knowledge Mining Using Surveys. A Final Remark. Computation. 6. Non-Singleton Type-1 Fuzzy Logic Systems. Introduction. Fuzzification and Its Effect on Inference. Possibilities. FBFs. Non-Singleton FLSs Are Universal Approximators. Designing Non-Singleton FLSs. Case Study: Forecasting of Time-Series. A Final Remark. Computation. III: TYPE-2 FUZZY SETS. 7. Operations on and Properties of Type-2 Fuzzy Sets. Introduction. Extension Principle. Operations on General Type-2 Fuzzy Sets. Operations on Interval Type-2 Fuzzy Sets. Summary of Operations. Properties of Type-2 Fuzzy Sets. Computation. 8. Type-2 Relations and Compositions. Introduction. Relations in General. Relations and Compositions on the Same Product Space. Relations and Compositions on Different Product Spaces. Composition of a Set with a Relation. Cartesian Product of Fuzzy Sets. Implications. 9. Centroid of a Type-2 Fuzzy Set: Type-Reduction. Introduction. General Results for the Centroid. Generalized Centroid for Interval Type-2 Fuzzy Sets. Centroid of an Interval Type-2 Fuzzy Set. Type-Reduction: General Results. Type-Reduction: Interval Sets. Concluding Remark. Computation. IV: TYPE-2 FUZZY LOGIC SYSTEMS. 10. Singleton Type-2 Fuzzy Logic Systems. Introduction. Rules. Fuzzy Inference Engine. Fuzzification and Its Effect on Inference. Type-Reduction. Defuzzification. Possibilities. FBFs: The Lack Thereof. Interval Type-2 FLSs. Designing Interval Singleton Type-2 FLSs. Case Study: Forecasting of Time-Series. Case Study: Knowledge Mining Using Surveys. Computation. 11. Type-1 Non-Singleton Type-2 Fuzzy Logic Systems. Introduction. Fuzzification and Its Effect on Inference. Interval Type-1 Non-Singleton Type-2 FLSs. Designing Interval Type-1 Non-Singleton Type-2 FLSs. Case Study: Forecasting of Time-Series. Final Remark. Computation. 12. Type-2 Non-Singleton Type-2 Fuzzy Logic Systems. Introduction. Fuzzification and Its Effect on Inference. Interval Type-2 Non-Singleton Type-2 FLSs. Designing Interval Type-2 Non-Singleton Type-2 FLSs. Case Study: Forecasting of Time-Series. Computation. 13. TSK Fuzzy Logic Systems. Introduction. Type-1 TSK FLSs. Type-2 TSK FLSs. Example: Forecasting of Compressed Video Traffic. Final Remark. Computation. 14. Epilogue. Introduction. Type-2 Versus Type-1 FLSs. Appropriate Applications for a Type-2 FLS. Rule-Based Classification of Video Traffic. Equalization of Time-Varying Non-linear Digital Communication Channels. Overcoming CCI and ISI for Digital Communication Channels. Connection Admission Control for ATM Networks. Potential Application Areas for a Type-2 FLS. A. Join, Meet, and Negation Operations For Non-Interval Type-2 Fuzzy Sets. Introduction. Join Under Minimum or Product t-Norms. Meet Under Minimum t-Norm. Meet Under Product t-Norm. Negation. Computation. B. Properties of Type-1 and Type-2 Fuzzy Sets. Introduction. Type-1 Fuzzy Sets. Type-2 Fuzzy Sets. C. Computation. Type-1 FLSs. General Type-2 FLSs. Interval Type-2 FLSs. References. Index.

Abstract: From the Publisher: Fuzzy control is emerging as a practical alternative to conventional methods of solving challenging control problems. Written by two authors who have been involved in creating theoretical foundations for the field and who have helped assess the value of this new technology relative to conventional approaches, Fuzzy Control is filled with a wealth of examples and case studies on design and implementation. Computer code and MATLAB files can be downloaded for solving the book's examples and problems and can be easily modified to implement the reader's own fuzzy controllers or estimators. Drawing on their extensive experience working with industry on implementations, Kevin Passino and Stephen Yurkovich have written an excellent hands-on introduction for professionals and educators interested in learning or teaching fuzzy control.

Abstract: Flash memory has become the most important storage media in mobile devices, and is beginning to replace hard disks in desktop systems However, its relatively poor random write performance may cause problems in the desktop environment, which has much more complicated requirements than mobile devices While a RAM buffer has been quite successful in hard disks to mask the low efficiency of random writes, managing such a buffer to fully exploit the characteristics of flash storage has still not been resolved In this paper, we propose a new write buffer management scheme called Block Padding Least Recently Used, which significantly improves the random write performance of flash storage We evaluate the scheme using trace-driven simulations and experiments with a prototype implementation It shows about 44% enhanced performance for the workload of MS Office 2003 installation

Abstract: Simultaneous Multithreading (SMT) is an execution model that executes multiple threads in parallel within a single processor pipeline. Usually, an SMT processor uses shared instruction queues to collect instructions from the different threads. Hence, an SMT processor’s performance depends on how the instruction fetch unit fills these instruction queues every cycle. In the recent past, many schemes have been proposed for fetching instructions into the SMT pipeline. These schemes focussed on increasing the throughput by using the number of instructions and the number of low confidence branch predictions currently in the pipeline, to decide which threads to fetch from. The goal of this paper is to investigate fetch policies that find a balance between fairness and throughput. We present metrics to quantify fairness. We then discuss techniques to use a set of pipeline system variables for achieving balanced throughput and fairness. Finally, we evaluate several fetch policies. Our evaluation confirms that many of our fetch policies provide a good balance between throughput and fairness.

Abstract: Main memory is a major shared resource among cores in a multicore system. If the interference between different applications' memory requests is not controlled effectively, system performance can degrade significantly. Previous work aimed to mitigate the problem of interference between applications by changing the scheduling policy in the memory controller, i.e., by prioritizing memory requests from applications in a way that benefits system performance.In this paper, we first present an alternative approach to reducing inter-application interference in the memory system: application-aware memory channel partitioning (MCP). The idea is to map the data of applications that are likely to severely interfere with each other to different memory channels. The key principles are to partition onto separate channels 1) the data of light (memory non-intensive) and heavy (memory-intensive) applications, 2) the data of applications with low and high row-buffer locality.Second, we observe that interference can be further reduced with a combination of memory channel partitioning and scheduling, which we call integrated memory partitioning and scheduling (IMPS). The key idea is to 1) always prioritize very light applications in the memory scheduler since such applications cause negligible interference to others, 2) use MCP to reduce interference among the remaining applications.We evaluate MCP and IMPS on a variety of multi-programmed workloads and system configurations and compare them to four previously proposed state-of-the-art memory scheduling policies. Averaged over 240 workloads on a 24-core system with 4 memory channels, MCP improves system throughput by 7.1% over an application-unaware memory scheduler and 1% over the previous best scheduler, while avoiding modifications to existing memory schedulers. IMPS improves system throughput by 11.1% over an application-unaware scheduler and 5% over the previous best scheduler, while incurring much lower hardware complexity than the latter.